2024

Journals

  1. T. Miyao, K. Yoshinaga, T. Tanaka, H. Ishikuro, M. Tada, and K. Uchida, “Imaginary impedance due to hopping phenomena and evaluation of dopant ionization time in cryogenic metal-oxide-semiconductor devices on highly doped substrate,” Appl. Phys. Express, 17, 051001, 2024: doi: 10.35848/1882-0786/ad3d2a
  2. H. Numata, N. Iguchi, M. Tanaka, K. Okamoto, S. Miura, K. Uchida, H. Ishikuro, T. Sakamoto, and M. Tada, “Superconducting Nb interconnects for Cryo-CMOS and superconducting digital logic applications,” Jpn. J. Appl. Phys., 63, 04SP73, 2024. doi: 10.35848/1347-4065/ad37c1
  3. T. Kato, T. Tanaka, and K. Uchida, “Detection of PPB-Level H2S Concentrations in Exhaled Breath Using Au Nanosheet Sensors with Small Variability, High Selectivity, and Long-Term Stability,” ACS Sens., 9, 2, 708-716, 2024. doi: 10.1021/acssensors.3c01944
  4. R. Toyoshima, T. Tanaka, T. Kato, H. Abe, K. Uchida, and H. Kondoh, ” Understanding of a Pt thin-film H2 sensor under working conditions by AP-XPS and XAFS,” Chem. Lett., 53, 2, upad031, 2024, doi: 10.1093/chemle/upad031
  5. C.-W. Pai, K. Uchida, M. Tada, and H. Ishikuro, “Design and analysis of a high-speed low-power comparator with regeneration enhancement and through current suppression techniques from 4 K to 300 K in 65-nm Cryo-CMOS,” Microelectronics Journal, 144, 106066, 2024. doi: 10.1016/j.mejo.2023.106066
  6. Y. Fujiki, T. Tanaka, K. Yakabe, N. Seki, M. Akiyama, K. Uchida, and Y.-G. Kim, “Hydrogen gas and the gut microbiota are potential biomakders for the development of experimental colitis in mice,” Gut Microbiome, 5, e3, 1012, 2024. doi: 10.1017/gmb.2023.17

Domestic Conferences

  1. 谷口雄麻,加藤太朗,濱中悠輔,田中貴久,内田建,「PtAu合金ナノシートによる水素検知と原子シミュレーションを用いた応答機構解析」,第71回応用物理学会春季学術講演会,東京,9.2 ナノ粒子・ナノワイヤ・ナノシート, 25a-31B-2, 2024年3月25日(講演奨励賞受賞記念講演).

2023

Journals

  1. S.-Y. Chou, H. Masai, M. Otani, H. V. Miyagishi, G. Sakamoto, Y. Yamada, Y. Kinoshita, H. Tamiaki, T. Katase, H. Ohta, T. Kondo, A. Nakada, R. Abe, T. Tanaka, K. Uchida, J. Terao, “Efficient electrocatalytic H2O2 evolution utilizing electron-conducting molecular wires spatially separated by rotaxane encapsulation,” Appl. Catal. B, 327, 122373, 2023.  doi: 10.1016/j.apcatb.2023.122373
  2. Y. Hamanaka, T. Tanaka, and K. Uchida, “Alkyl-Chain-Length and Temperature Dependencies of Sensor Responses to Aliphatic Alcohols in Nanostructured Pt-Based Sensors,” ACS Appl. Nano Mater., 6, 16433-16441, September 11, 2023. doi: 10.1021/acsanm.3c02676
  3. M. Tada, K. Okamoto, T. Tanaka, M. Miyamura, H. Ishikuro, K. Uchida, and T. Sakamoto, “A 65nm Cryogenic CMOS Design and Performance at 4.2K for Quantum State Controller Application,” J. Elec. Dev. Soc., 12, 28-33, 2024. doi: 10.1109/jeds.2023.3340136

International Conferences

  1. T. Kato, T. Tanaka, H. Miyagishi, J. Terao, K. Uchida, “Study on sub-100-nm-scale measurement of temperature distribution in Joule-heated Au nanosheet gas sensors using self-assembled monolayers as temperature probes”, 7th IEEE Electron Device Technology and Manufacturing (EDTM) Conference 2023, Seoul, Republic of Korea, Mar. 9, 2023. doi: 10.1109/EDTM55494.2023.10103112
  2. Y. Narita, T. Tanaka, K. Uchida, “Low-resistance (NH4)xWO3 Nanowire Sensors for Acetone Recognition Operating at Low Voltage with Low Power Consumption”, 7th IEEE Electron Device Technology and Manufacturing (EDTM) Conference 2023, Seoul, Republic of Korea, Mar. 8, 2023 (This paper won the “Best Student Paper Award”!) doi: 10.1109/EDTM55494.2023.10102994
  3. T. Sakamoto, M. Miyamura, K. Funahashi, M. Tada, K. Uchida, H. Ishikuro, “Gate-Length Dependent Variability of nMOSFET at Cryogenic Temperatures”,  2023 International Conference on Solid State Devices and Materials (SSDM), F-1-01, Nagoya, Japan, Sep. 6, 2023. 
  4. T. Kato, T. Tanaka, K. Uchida, “Thermal-aware design of metal nanosheet sensors for low-energy, highly sensitive hydrogen sulfide nanoscale sensors”,  2023 International Conference on Solid State Devices and Materials (SSDM), A-2-02, Nagoya, Japan, Sep. 6, 2023.
  5. H. Numata, N. Iguchi, M. Tanaka, K. Okamoto, S. Miura, K. Uchida, H. Ishikuro, T. Sakamoto, and M. Tada, “Superconducting Nb Interconnects for Cryo-CMOS and Superconducting Digital Logic Applications,” ADMETA Plus 2023, Tokyo, Japan, Oct. 12, 2023.
  6. Y. Taniguchi, T. Kato, Y. Hamanaka, T. Tanaka, and K. Uchida, “Experimental and Simulation Studies of Acetone Detection by Pt-Au Nanofilm Sensors”, 244th ECS Meeting, Gothenburg, Sweden, Oct. 8, 2023.
  7. K. Uchida, “Low-energy Sensors for Internet-of-Things (IoT),” 2023 IEEE Taipei Blockchain (ITBC) Forum, National Taiwan University, Taipei, Taiwan, Nov. 11, 2023 (Invited).

Domestic Journal

  1. 田中貴久,内田建,「イオン液体と多電極構造から成る集積化ガスセンサを用いた多成分の微量ガス検出」,応用物理, 第92巻,第7号,p416, 2023年.

Domestic Conferences

  1. 加藤太朗,田中貴久,宮岸拓路,寺尾潤,内田建,「自己組織化単分子膜によるAuナノシートの温度分布計測」,第70回応用物理学会春季学術講演会,東京,6.6 プローブ顕微鏡, 17p-D519-6, 2023年3月17日.
  2. 濱中悠輔,田中貴久,内田建,「Ptナノ触媒の形状が脂肪族アルコールセンシング特性へ及ぼす効果と長鎖アルコールセンサの実現」,第70回応用物理学会春季学術講演会,東京,9.2 ナノ粒子・ナノワイヤ・ナノシート, 17p-D221-6, 2023年3月17日.
  3. 加藤太朗,田中貴久,内田建,「熱配慮設計に基づいた低エネルギー硫化水素センサ」,第84回応用物理学会秋季学術講演会,熊本,9.2 ナノ粒子・ナノワイヤ・ナノシート, 19a-A309-5, 2023年9月19日.
  4. 成田雄紀,田中貴久,内田建,「低電圧下において低消費電力駆動が可能な低抵抗(NH4)xWO3ナノワイヤアセトンセンサ」,第84回応用物理学会秋季学術講演会,熊本,9.2 ナノ粒子・ナノワイヤ・ナノシート, 19a-A309-4, 2023年9月19日.
  5. 吉永啓人,宮尾知寿,田中貴久,石黒仁揮,多田宗弘,内田建,「極低温におけるpn接合ダイオードの特性」,第84回応用物理学会秋季学術講演会,熊本,13.5 デバイス/配線/集積化技術, 21a-A304-8, 2023年9月21日.
  6. 谷口雄麻,加藤太朗,濱中悠輔,田中貴久,内田建,「PtAu合金ナノシートによるアセトンセンシングと原子シミュレーションを用いた応答機構解析」,第84回応用物理学会秋季学術講演会,熊本,9.2 ナノ粒子・ナノワイヤ・ナノシート, 19a-A309-3, 2023年9月19日.

2022

Journals

  1. R. Toyoshima, T. Tanaka, T. Kato, K. Uchida, H. Kondoh, “Origin of the high selectivity of the Pt-Rh thin-film H2 gas sensor studied by operando ambient-pressure X-ray photoelectron spectroscopy at working conditions,” J. Phys. Chem. Lett., 13, 8546-8552, Sep. 6, 2022.  doi: 10.1021/acs.jpclett.2c02365
  2. M. Matsumura, T. Tanaka, K. Uchida, “Experimental study on shallow and deep dopant properties at the interface of PtOx/ZnO Schottky diodes,” Jpn. J. Appl. Phys., 61, SD1031, May 20, 2022.  doi: 10.35848/1347-4065/ac54f3
  3. T. Tanaka, Y. Hamanaka, T. Kato, K. Uchida, “Simultaneous detection of multi-gas components by ionic-gel sensors with multiple electrodes,” ACS Sensors, 7, 716-721, March 16, 2022. doi:10.1021/acssensors.1c02721
  4. K. Okamoto, T. Tanaka, M. Miyamura, H. Ishikuro, K. Uchida, T. Sakamoto, M. Tada, “Cryogenic operation of NanoBridge at 4K for controlling qubit,” Jpn. J. Appl. Phys., 61, SC1049, Feb. 18,2022. (7 pages)  doi: 10.35848/1347-4065/ac4303

International Conferences

  1. T. Tanaka, K. Okamoto, M. Tada, K. Uchida, “Stochastic modeling of cryogenic and room temperature operation of ReRAM,” 35th International Microprocess and Nanotechnology Conference, Tokushima, Japan, Nov. 10, 2022.
  2. K. Uchida and T. Tanaka, “Low-Eneryg Self-Heated Metal & Graphene Molecular Sensors for Ubiquitous Health Monitoring,” Advanced Metalization Conference (ADMETA plus) 2022, Session 6, Hybrid (Online+Tokyo, Japan), October 14, 2022 (Invited).
  3. K. Uchida, T. Miyao, T. Tanaka, “Device characterization for cryogenic CMOS, investigating transient phenomena,” Next Generation Quantum Coumputing, Online + Onsite (Keio Univ., Kanagawa, Japan), August 30, 2022 (Invited).
  4. T. Miyao, T. Tanaka, I. Imanishi, M. Ichikawa, S. Nakagawa, H. Ishikuro, T. Sakamoto, M. Tada, K. Uchida, “Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors,” 2022 Device Research Conference (DRC), S2-3, Ohio, USA, June 27, 2022. doi: 10.1109/DRC55272.2022.9855815
  5. K. Okamoto, T. Tanaka, M. Miyamura, H. Ishikuro, K. Uchida, T. Sakamoto, M. Tada, ”Cryogenic CMOS Performance Analysis Including BEOL Characteristics at 4K for Quantum Controller Application,” International Interconnect Technology Conference (IITC) 2022, Hybrid (Zoom+San Jose, USA), June 30, 2022.
  6. M. Ichikawa, T. Tanaka, K. Uchida, T. Miyao, M. Tada, H. Ishikuro, ”In Situ Monitoring Technique of Self-Heating in Bulk MOSFETs at Cryogenic Temperature Using Subthreshold Current,” Latin American Electron Devices Conference (LAEDC) 2022, Puebla, Mexico, July 4, 2022.
  7. K. Uchida and T. Tanaka, “Low-energy Integrated Multi-molecular Sensing Systems for Breath-based Health Monitoring,” Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), A3-2, Virtual, July 7, 2022 (Invited).
  8. Y. Hamanaka, T. Tanaka, K. Uchida, “Comparison of Pt Nanosheet and Pt Nanoparticles-Decorated Graphene in Aliphatic Alcohol Sensing Properties,” Materials Research Society, Boston, USA, NM06.05.36, Nov. 29, 2022.
  9. T. Umeda, T. Tanaka, K. Uchida, “Fabrication and Characterization of IrOx Nanosheets for Methane Sensors,” Materials Research Society, Boston, USA, SF05.02.08, Nov. 28, 2022.

Domestic Conferences

  1. 田中貴久,田渕健太,舘洞浩平,椎木陽介,中川修哉,高橋綱己,清水涼太,石黒仁揮,黒田忠広,柳田剛,内田建,「自己ジュール加熱金属ナノシートアレイによる微量な多分子の低消費電力ガスセンシング」,第69回応用物理学会春季学術講演会(2022 ハイブリッド開催),13.5 デバイス/配線/集積化技術,23p-E307-2,2022年3月23日 (シリコンテクノロジー分科会論文賞受賞記念講演).
  2. 濱中悠輔,田中貴久,内田建,「二端子間イオン液体のインピーダンス変化による低分子ガスの選択的認識」,第69回応用物理学会春季学術講演会(2022 ハイブリッド開催),12.3 機能材料・萌芽的デバイス,22a-E307-3,2022年3月22日.
  3. 梅田竜生,田中貴久,内田建,「IrOxナノシートによるCH4センサの作製」,第69回応用物理学会春季学術講演会(2022 ハイブリッド開催),9.2 ナノ粒子・ナノワイヤ・ナノシート,24a-F408-6,2022年3月24日.
  4. 宮尾知寿,田中貴久,内田建,「極低温(4K)におけるMOS容量評価手法の開発」,第69回応用物理学会春季学術講演会(2022 ハイブリッド開催),13.5 デバイス/配線/集積化技術,23p-E307-17,2022年3月23日.
  5. 松村美貴也,田中貴久,内田建,「PtOx/ZnO ショットキー接合の界面近傍におけるドナー濃度とその起源について」,第69回応用物理学会春季学術講演会(2022 ハイブリッド開催),6.3 酸化物エレクトロニクス,24a-E204-1,2022年3月24日.
  6. 田中貴久,内田建,「シリコン系ナノスケール分子センサ」,R025先進薄膜界面機能創成委員会 第9回研究会 (2022オンライン開催),2022年6月29日(依頼公演
  7. 加藤太朗,田中貴久,内田建,「Auナノシートを用いた低エネルギー・長寿命な硫化水素センサ」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),9.2 ナノ粒子・ナノワイヤ・ナノシート,23p-B101-6,  2022年9月23日.
  8. 宮尾知寿,田中貴久,今西創生,市川雅幸,中川修哉,石黒仁揮,阪本利司,多田宗弘,内田建,「65-nm CMOSの4.2 K動作における過渡特性」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),13.5 デバイス/配線/集積化技術,21p-C105-3,  2022年9月21日.
  9. 田中貴久,濱中悠輔,加藤太朗,内田建,「イオンゲル/多電飾構造を用いたマルチガスセンシング」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),12.7 医用工学・バイオチップ,22p-A105-19,  2022年9月22日.
  10. 田中貴久,内田建,「Ru配線の原子論的輸送計算に向けた反応力場構築」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),13.1 Si系基礎物性・表面界面・シミュレーション,21a-C206-8,  2022年9月21日.
  11. 田中貴久,内田建,「小型・低エネルギーの低分子センサ:集積化と応用の可能性」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),12 有機分子・バイオエレクトロニクス ,21a-A401-2,  2022年9月21日(招待講演).
  12. 田中貴久,「ガスセンサ機能集積の手法と応用可能性」,EISESiV&iSyMs合同シンポジウム (東京工業大学大岡山キャンパス),2022年10月19日(依頼公演
  13. 内田建,「ナノスケール電子材料を用いたエレクトロニクス・デバイス」,NanoHubワークショップ(東京大学 武田先端知ビル),2022年11月9日.
  14. 成田雄紀,田中貴久,内田建,「水熱合成(NH4)xWO3を用いた低消費エネルギーアセトンセンサ」,第83回応用物理学会秋季学術講演会(2022ハイブリッド開催,東北大学),9.2 ナノ粒子・ナノワイヤ・ナノシート,23p-B101-4,  2022年9月23日.

2021

Journals

  1. T. Kato, T. Tanaka, T. Yajima, K. Uchida, “Temperature dependence of resistivity increases induced by thiols adsorption in gold nanosheets,” Jpn. J. Appl. Phys., 60, SBBH13, February 3, 2021 (7 pages). doi: 10.35848/1347-4065/abd6de
  2. T. Tanaka, T. Kato, T. Yajima, K. Uchida, “Atomistic simulation study of impacts of surface carrier scatterings on carrier transport in Pt nanosheets,” IEEE Electron Dev. Lett., 42, 1057-1060, May 4,2021.  doi: 10.1109/LED.2021.3077466

International Conferences

  1. K. Okamoto, T. Tanaka, M. Miyamura, H. Ishikuro, K. Uchida, T. Sakamoto, M. Tada, “Cryogenic operation of NanoBridge at 4K for controlling qubit,” 2021 International Conference on Solid State Devices and Materials (SSDM), B-5-08, Web Conference, Sep.8, 2021.
  2. T. Tanaka, K. Uchida, “Enhanced electron phonon scattering in Si nanowires covered by oxide,” 240th ECS Meeting, Online, October 10-14, 2021. (Invited)
  3. Y. Hamanaka, T. Tanaka, K. Uchida, “ Selective Recognition of Acetone in Air Against Hydrogen By Impedance Measurement of Two-Terminal Electrochemical Sensors Based on Ionic Liquids”, 240th ECS Meeting, Online, October 10-14, 2021.
  4. M. Matsumura, T. Tanaka, K. Uchida, “ Experimental Investigation of Interface Defect Properties in PtOx/ZnO Schottky Diodes by Deep Level Transient Spectroscopy”, 34th International Microprocesses and Nanotechnology Conference (MNC), Online, October 26-29, 2021.

Domestic Conferences

  1. 田中貴久,内田建,「酸素吸着によるPt薄膜抵抗率変化の原子論的解析」,第68回応用物理学会春季学術講演会(2021 Zoomオンライン開催),13.1 Si系基礎物性・表面界面・シミュレーション,16p-Z225-7,2021年3月16日.
  2. 濱中悠輔,田中貴久,内田建,「二電極間イオン液体の電気化学測定による水素とアセトンの選択的検知」,第68回応用物理学会春季学術講演会(2021 Zoomオンライン開催),12.3 機能材料・萌芽的デバイス,17a-Z24-6,2021年3月17日.
  3. 松村美貴也,田中貴久,内田建,「PtOx/ZnOショットキー接合のDLTSによる界面欠陥の評価」,第68回応用物理学会春季学術講演会(2021 Zoomオンライン開催),6.3 酸化物エレクトロニクス,16p-Z33-3,2021年3月16日.
  4. 加藤太朗,田中貴久,内田建,「Auナノシートを用いた硫化水素センサの創出」,第68回応用物理学会春季学術講演会(2021 Zoomオンライン開催),9.2 ナノ粒子・ナノワイヤ・ナノシート,17p-Z18-11,2021年3月17日.
  5. 内田建,「社会課題解決を目指したナノ電子材料・デバイスにおける熱の課題と利用」,日本伝熱学会創立60周年記念 第58回 日本伝熱シンポジウム,オンライン開催,2021年 5月26日(特別講演).
  6. 加藤太朗,田中貴久,内田建,「Auナノシートを用いた小型・低エネルギー硫化水素センサ」,第82回応用物理学会秋季学術講演会(2021 Zoomオンライン開催),9.2 ナノ粒子・ナノワイヤ・ナノシート,10p-N403-1,2021年9月10日(講演奨励賞受賞記念講演).
  7. 田中貴久,内田建,「ナノスケール化学センサ集積に向けた局所熱制御と表面/界面設計」,第82回応用物理学会秋季学術講演会(2021 Zoomオンライン開催),シンポジウム(センサ融合に向けたセンサ集積技術),13p-S202-7,2021年9月13日(招待講演).
  8. 内田建,田中貴久,「低エネルギー・集積化分子認識センサ」,2021年 電気学会 電子・情報・システム部門大会,TC6 知能化情報環境を支えるナノエレクトロニクス基盤ヘテロ集積化・応用技術の展開,TC-6-5,2021年9月17日(依頼講演).

International Workshops

  1. M. Matsumura, T. Tanaka, K. Uchida, “ Experimental Investigation of Electrical and Interface Properties of PtOx/ZnO Schottky Diodes ”, Tsinghua-UTokyo Transscale Materials Science Workshop on Materials, Online, December 3, 2021.
  2. T. Kato, T. Tanaka, K. Uchida, “Selective Hydrogen Sulfides Sensors using Au Nanofilms”, 2021 NTU-UTokyo Online Joint Conference of Innovation on Emergent Materials, Online, December 9, 2021.

2020

Journals

  1. R. Toyoshima, T. Tanaka, T. Kato, K. Uchida, and H. Kondoh, “In situ XPS analysis of a Pt thin-film sensor for highly sensitive H2 detection,” Chem. Commun., 56, 10147-10150, Jul 21, 2020, doi: 10.1039/D0CC04030D
  2. T. Tanaka, T. Yajima, and K. Uchida, “Impact of defects in self-assembled monolayer on humidity sensing by molecular functionalized transistors,”  Jpn. J. Appl. Phys., 59, SIIE04, April 13, 2020. doi: 10.35848/1347-4065/ab80dc (selected as SPOTLIGHT paper and Highlights of 2020)
  3. T. Yajima, T. Nishimura, T. Tanaka, K. Uchida, and A. Toriumi, “Modulation of VO2 Metal–Insulator Transition by Ferroelectric HfO2 Gate Insulator,” Adv. Electron. Mater.,  6, 1901356, March 20, 2020, doi: 10.1002/aelm.201901356
  4. K. Sawada, T. Tanaka, T. Yokoyama, R. Yamachi, Y. Oka, Y. Chiba, H. Masai, J. Terao, and K. Uchida, “Co-porphyrin functionalized CVD graphene ammonia sensor with high selectivity to disturbing gases: hydrogen and humidity,” Jpn. J. Appl. Phys., 59, SGGG09, February 2020 (6 pages) doi: 10.35848/1347-4065/ab6b80
  5. 矢嶋赳彬, “金属絶縁体転移材料を利用した回路技術の研究,” 電子情報通信学会, 和文論文誌C, 2020, doi:

International Conferences

  1. T. Yajima, “VO2 Mott Transistors for Low-Voltage ON/OFF Switching,” 21st International Symposium on Eco-materials Processing and Design (ISEPD), Yantai, China, January 12-15, 2020. (Keynote)
  2. T. Tanaka, T. Yajima, and K. Uchida “Modeling of Graphene Sensor Functionalized with Pt Nanoparticles by Molecular Dynamics and Grand Canonical Monte Carlo Simulations with Reactive Force Field,” 2020 International Conference on Solid State Devices and Materials (SSDM), H-7-06, Web Conference, Sep.30, 2020.
  3. T. Kato, T. Tanaka, T. Yajima, and K. Uchida “Experimental Evidence for Temperature Dependence of Adsorbate-induced Scattering in Metal Nanosheets and Its Implication to Gas Sensing Applications,” 2020 International Conference on Solid State Devices and Materials (SSDM), H-7-01, Web Conference, Sep.30, 2020.
  4. K. Tatehora, Y. Shiiki, S. Nakagawa, T. Tanaka, K. Uchida, and H. Ishikuro, “A Wide Range and High Accuracy Sensor Interface with Switching Regulator for Coin-Cell Powered Tiny Wirelesss Sensor Node,” IEEE ISCAS, Seville, Spain, Oct.11-14 (2020).
  5. K. Uchida, “Nanoscale Thermal Management for Low-energy Integrated Electronics in the Internet-of-Things Era,” Nanotechnology for a Sustainable Future, Waterloo Institute for Nanotechnology, Online via WebEx, Nov. 19-20 (2020). (Invited)

Domestic Conferences

  1. 田中貴久,内田建「熱の時空間制御による分子センサの低エネルギー化 (Sub-mW and ppm-Level Detection of Gas Molecules for Breath-Based Healthcare)」,電子デバイス界面テクノロジー研究会(東レ総合研修センター),3 熱制御,3-2,2020年1月31日.(招待講演).
  2. 田中貴久,矢嶋赳彬,内田建,「分子修飾トランジスタガスセンサにおけける修飾分子と標的ガス分子との相互作用の研究」,第67回応用物理学会春季学術講演会(2020 上智大),13.1 Si系基礎物性・表面界面・シミュレーション,12p-A202-10,2020年3月12日.
  3. 石川潤,田中貴久,内田建,「拡張金属ゲート電極にホスト分子を修飾したISFETの温度センサへの応用」,第67回応用物理学会春季学術講演会(2020 上智大),1.5 計測技術・計測標準,12p-B408-3,2020年3月12日.
  4. 加藤太朗,田中貴久,矢嶋赳彬,内田建,「金属ナノシートの電気抵抗に分子吸着が及ぼす影響」,第67回応用物理学会春季学術講演会(2020 上智大),9.2 ナノ粒子・ナノワイヤ・ナノシート,13a-D305-10,2020年3月13日.
  5. 工藤櫻彩子,張国柱,矢嶋赳彬,田中貴久,高橋綱己,柳田剛,八木 俊介,内田 建,「水熱合成により得られるWO3の形態と結晶構造に添加剤とpHが及ぼす影響」,第67回応用物理学会春季学術講演会(2020 上智大),9.2 ナノ粒子・ナノワイヤ・ナノシート,13a-D305-8,2020年3月13日.
  6. 矢嶋赳彬, 「スパイキングニューロンを用いた超省エネ環境発電用回路」, 第67回応用物理学会春季学術講演会(2020 上智大) シンポジウム「超スマート社会のためのエネルギーハーベスティングの展開」,A301-T28, 2020年3月13日(招待講演).
  7. 矢嶋赳彬,西村知紀,田中貴久,内田建,鳥海 明,「VO2モットトランジスタにおける超急峻ゲート変調の起源」,第67回応用物理学会春季学術講演会(2020 上智大),6.3 酸化物エレクトロニクス,15a-D311-3,2020年3月15日.
  8. 田中貴久,矢嶋赳彬,内田建,「原子スケールでSiO2/Si界面の電子フォノン散乱を考慮したSiナノワイヤ中の移動度計算」,第81回応用物理学会秋季学術講演会 (2020 オンライン開催) ,13.1 Si系基礎物性・表面界面・シミュレーション,10p-Z09-19,2020年9月10日.
  9. 加藤太朗,田中貴久,矢嶋赳彬,内田建,「金属ナノシートへの分子吸着によるキャリア移動度変化の解析」,第81回応用物理学会秋季学術講演会 (2020 オンライン開催) ,9.2 ナノ粒子・ナノワイヤ・ナノシート,10p-Z26-1,2020年9月10日.
  10. 内田建,田中貴久,「時間的・空間的に局在化したナノ熱による機能性電子デバイスの創製」,第81回応用物理学会秋季学術講演会 (2020 オンライン開催) ,T18 フォノンエンジニアリングの最前線,10p-Z13-1,2020年9月10日 (招待講演).

2019

Journals

  1. K. Uchida, and T. Tanaka, “Nanoscale, low-energy molecular sensors for health care and environmental monitoring,” AAPPS Bulletin, vol. 29, 16-20, June 2019 (5 pages) doi: 10.22661/AAPPSBL.2019.29.3.16
  2. T. Tanaka, K. Tabuchi, K. Tatehora, Y. shiiki, S. Nakagawa, T. Takahashi, R. Shimizu, H. Ishikuro, T. Kuroda, T. Yanagida and K. Uchida, “Low-Power and ppm-Level Multimolecule Detection by Integration of Self-Heated Metal Nanosheet Sensors,” IEEE Trans. Electron Devices, vol. 66, 5393-5398, October 2019. (6 pages)  doi:10.1109/TED.2019.2945932

International Conferences

  1. T. Tanaka, K. Tabuchi, K. Tatehora, Y. Shiiki, S. Nakagawa, T. Takahashi, R. Shimizu, H. Ishikuro, T. Kuroda, T. Yanagida and K. Uchida, “Low-power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets,” 2019 Symposia on VLSI Technology and Circuits (VLSI), JFS2-3, Kyoto, Japan, June 10, 2019.
  2. T. Yajima, “Designing Neuron Functionality Based on Phase TransitionMaterials,” Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD), Busan, Korea, July 1- 3, 2019. (Invited)
  3. K. Sawada, T. Tanaka, T. Yokoyama, R. Yamachi, Y. Oka, Y. Chiba, H. Masai, J. Terao, K. Uchida, “Co-porphyrin–functionalized CVD graphene ammonia sensor with high selectivity to hydrogen,” 2019 International Conference on Solid State Devices and Materials (SSDM), A-5-04, Nagoya, Japan, Sep. 2-5, 2019.
  4. T. Yajima, Y. Samata, T. Nishimura, and A. Toriumi, “Impact of Scaling the VO2-Channel Mott Transistor below Material Correlation Length,” 2019 International Conference on Solid State Devices and Materials (SSDM), E-4-02, Nagoya, Japan ,Sep. 2-5,  2019.
  5. T. Yajima, T. Nishimura, and A. Toriumi, “New Operation Mode of VO2 Mott Transistors for Ultra-Sharp ON/OFF Switching,” 26th International Workshopon Oxide Electronics (iWOE), Kyoto, Japan, Sep. 29 – Oct. 2, 2019.
  6. T. Tanaka, T. Yajima and K. Uchida, “Atomistic Study of Sensing Mechanisms of Molecular Decorated FETs,” 32nd International Microprocesses and Nanotechnology Conference (MNC), 31C-10-4, Oct. 31, 2019.
  7. T. Yajima, T. Tanaka, Y. Samata, K. Uchida and A. Toriumi, “High-speed Low-energy Heat Signal Processing via Digital-compatible Binary Switch with Metal-insulator Transitions,” 65th International Electron Device Meeting (IEDM), 37.6, San Francisco, USA, Dec. 11, 2019.

Domestic Conferences

  1. 澤田圭,横山誉宗,斎藤雄太,山知亮介,田中貴久,岡勇気,千葉湧介,寺尾潤,内田建,「呼気アンモニア検知のためのコバルトポルフィリン修飾グラフェンデバイスの開発」,第66回応用物理学会春季学術講演会(2019 東工大),17.7 医用工学・バイオチップ,9a-S421-8,2019年3月9日.
  2. 藏本駿介,伊部徳朗,祖父江琢哉,萩原一樹,田中貴久,高橋綱己,柳田剛,内田建,「SAM修飾MOSFET型センサの表面電界が感度に与える影響」,第66回応用物理学会春季学術講演会(2019 東工大),13.5 デバイス/配置/集積化技術,9p-S221-15,2019年3月9日.
  3. 田中貴久,澤田圭,内田建,「化学的ドーピングによるグラフェンガスセンサの高感度化」,第66回応用物理学会春季学術講演会(2019 東工大),17.2 グラフェン,10a-W521-1,2019年3月10日.
  4. 萩原一樹,祖父江琢哉,田中貴久,内田建,「Pt-MOSキャパシタを用いたアセトンセンサ」,第66回応用物理学会春季学術講演会(2019 東工大),1.3 新技術・複合新領域,10a-S321-10,2019年3月10日.
  5. 松澤一也,阿部真利,小田嘉則,田中貴久,内田建「境界条件変調による領域分割デバイス・シミュレーション」,第66回応用物理学会春季学術講演会(2019 東工大),13.1 Si 系基礎物性・表面界面・シミュレーション,10p-W934-7,2019年3月10日.
  6. 田中貴久,田渕健太,舘洞康平,椎木陽介,中川修哉,高橋綱己,清水涼太,石黒仁揮,黒田忠広,柳田剛,内田建,”Low-power and ppm-Level Detection of Gas Molecules by Integrated Metal Nanosheets,” VLSIシンポジウム報告会,2019年7月5日(依頼講演).
  7. 矢嶋赳彬, 「材料特性を利用したニューロモルフィック素子の設計”」,電気情報通信学会ソサイエティ大会 ( 2019 大阪大学),CI-4-3, 2019年9月11日 (招待講演).

2018

Journals

  1. T. Tanaka, S. Hoshino, T. Takahashi, and K. Uchida, “Nanoscale Pt thin film sensor for accurate detection of ppm level hydrogen in air at high humidity,” Sensors and Actuators B., vol. 258, 913, April 2018 (7 pages) doi: 10.1016/j.snb.2017.11.115
  2. T. Tanaka and K. Uchida, “Numerical analysis of band tails in nanowires and their effects on the performance of tunneling field-effect transistors,” Jpn. J. Appl. Phys., vol. 57, 06HC04, June 2018 (4 pages) doi: 10.7567/JJAP.57.06HC04
  3. T. Yokoyama, T. Tanaka, Y. Shimokawa, R. Yamachi, Y. saito and K. Uchida, “Pd-Functionalized, Suspended Graphene Nanosheet for Fast, Low-Energy Multimolecular Sensors,” ACS Appl. Nano Mater., vol. 1, 3886-3894, July 2018 doi: 10.1021/acsanm.8b00667
  4. F. Zhuge, T. Takahashi, M. Kanai, K. Nagashima, N. Fukata, K. Uchida and T. Yanagida, “Thermal conductivity of Si nanowires with δ-modulated dopant distribution by self-heated 3ω method and its length dependence,” J. Appl. Phys., vol. 124, 065105, August 2018 (8 pages) doi: 10.1063/1.5039988
  5. T. Tanaka, T. Yokoyama and K. Uchida, “Enhancement of Sensor Response in Graphene Gas Sensors by Gate-Induced Field,” IEEE Electron Dev. Lett., vol. 39, 1924-1927, October 2018 doi: 10.1109/LED.2018.2875892

International Conferences

  1. T. Yokoyama, T. Tanaka, Y. Shimokawa, R. Yamachi, Y. Saito and K. Uchida, “High-Field Effects on Sensor Response of Pd-Functionalized, Suspended Graphene for Hydrogen Sensing,” E-MRS Spring Meeting, D: Carbon materials: surface chemistry and biomedical applications Ⅲ, Strasbourg, France, June 21, 2018.
  2. R. Kanazawa, T. Takahashi, T. Tanaka, A. Kumada, N. Ibe and K. Uchida, “Thermal Conductivity Measurement of Annealed Al2O3 Thin Films Deposited by ALD,” E-MRS Spring Meeting, I: Materials research for group Ⅳ semiconductors: growth, characterization and technological developments Ⅲ, Strasbourg, France, June 21, 2018.
  3. K. Uchida, T. Tanaka, T. Yokoyama, “Low-Power Nanoscale Sensors for Low-Concentration Hydrogen Detection in Expired Air,” AiMES 2018 ECS and SMEQ Joint International Meeting, Cancun, Mexico, October 2, 2018 (Invited). Abstract

Domestic Conferences

  1. 田中貴久,内田建,「ナノワイヤ中の不純物によるバンドテールがトンネルFETに与える影響の解析」,第65回応用物理学会春季学術講演会(2018春 早稲田大),13.1 Si 系基礎物性・表面界面・シミュレーション,18a-B301-2,2018年3月18日(一般講演).
  2. 伊部 徳朗, 藏本 駿介, 田中貴久,内田建,「自己組織化単分子膜で修飾したバックゲート型FETセンサにおいて分子センシングにゲートバイアスが与える影響」,第65回応用物理学会春季学術講演会(2018春 早稲田大),13.1 Si 系基礎物性・表面界面・シミュレーション,19p-C101-11,2018年3月19日(一般講演)
  3. 内田建,「大学での電子デバイス研究・教育における計算機シミュレータの利用」,第65回応用物理学会春季学術講演会(2018春 早稲田大),13 半導体, S22 デバイスシミュレーション技術の活用と将来展望,18p-A202-2,2018年3月18日(招待講演).
  4. 松澤 一也, 阿部 真利, 小田 嘉則, 秋山 豊, 田中 貴久, 内田 建, 「柔軟なデバイス・シミュレーション・モデルの開発に向けて」第65回応用物理学会春季学術講演会(2018春 早稲田大),13 半導体, S22 デバイスシミュレーション技術の活用と将来展望,18p-A202-4, 2018年3月18日招待講演).
  5. 斎藤雄太,横山誉宗,田中貴久,内田建,「ガスセンサアレイによる人口嗅覚実現へ向けた試み」,人工知能学会全国大会(鹿児島県 城山観光ホテル),4Pin1-38,2018年6月8日.
  6. 内田建,田中貴久,「ナノスケール分子センサによる健康状態管理へ向けて」,電気学会電子・情報・システム部門大会(北海道大学),TC14 IoT社会へ向けたナノエレクトロニクス新機能創出・集積化技術の展開,TC14-6,2018年9月7日.
  7. 澤田圭,横山誉宗,斎藤雄太,山知亮介,田中貴久,岡勇気,千葉湧介,寺尾潤,内田建,「亜鉛ポルフィリン修飾グラフェンを用いたアンモニアセンサの作製と評価」,第79回応用物理学会秋季学術講演会(2018秋 名古屋国際会議場),17.2 グラフェン,20p-311-9,2018年9月20日.
  8. 祖父江琢哉,藏本駿介,萩原一樹,田中貴久,内田建,「Fowler-Nordheim電流がMOS容量型センサに与える影響」,第79回応用物理学会秋季学術講演会(2018秋 名古屋国際会議場),13.1 Si 系基礎物性・表面界面・シミュレーション,21a-135-4,2018年9月21日.

2017

International Conferences

  1. K. Uchida and T. Yanagida, “Nanoscale low-energy molecular sensors with thermal awareness,” The 9th US-Japan Joint Seminar on Nanoscale Transport Phenomena, Tokyo, Japan, July 5, 2017 (Invited).
  2. T. Tanaka, T. Yokoyama, Y. Shimokawa, R. Yamachi, A. Goto, T. Takahashi and K. Uchida, “Demonstration of sensitivity enhancement by gate operation of Pd-functionalized graphene hydrogen sensors,” European Material Research Society Fall Meeting 2017, Warsaw, Poland, September 19, 2017.
  3. Y. Shimokawa , R. Yamachi , A. Goto , G. Takeuchi , T. Yokoyama , Y. Saito , T. Tanaka , T. Takahashi , K. Uchida, “Dependence of Sensing Property in Pt-Functionalized Graphene Gas Sensor on Alkyl-Chain Length,” European Material Research Society Fall Meeting 2017, Warsaw, Poland, September 19, 2017.
  4. T. Tanaka and K. Uchida, “Numerical analysis of band tailing and electron transport near conduction band edge in doped Si nanowires,” The 30th International Microprocess and Nanotechnology Conference, Jeju, Korea, November 7, 2017.

Domestic Conferences

  1. 内田建,”Ultra-low Energy Nano-scaled Sensors for Three-Dimensionally Integrated IoT Systems,” 第日仏工業技術会,2回日仏三次元集積回路の課題と今後の展開に関するワークショップ,2017年2月24日(招待講演).
  2. 後藤瑛人,山口公平,下川慶久,山知亮介,竹内豪,田中貴久,高橋綱己,内田建,「Pd修飾グラフェンセンサの水素感度のPdサイズ依存性」,第64回応用物理学会春季学術講演会(2017春 パシフィコ横浜),17.2 グラフェン, 15a-B6-8,2017年3月15日(一般講演).
  3. 下川慶久,後藤瑛人,山知亮介,横山誉宗,斎藤雄太,田中貴久,高橋綱己,内田建,「 Ptナノドット修飾グラフェンセンサによるガスの選択的検知」,第64回応用物理学会春季学術講演会(2017春 パシフィコ横浜),17.2 グラフェン, 15a-B6-10,2017年3月15日(一般講演).
  4. 足立薫彦,佐野宏亮,下川慶久,高橋綱己,内田建,「オゾン酸化によるエンハンスメント型MoS2トランジスタの作製」,第64回応用物理学会春季学術講演会(2017春 パシフィコ横浜),17.3 層状物質, 16a-F203-8,2017年3月16日(一般講演).
  5. 内田建,「ナノ構造・ナノ材料を利用した電子デバイスの熱配慮設計」,応用物理学会 2017年第3回 極限ナノ造形・構造物性研究会 公開講演会,東京工業大学 大岡山キャンパス,2017年7月4日(招待講演).
  6. 下川 慶久,山知 亮介,横山 誉宗,斎藤 雄太,田中 貴久,高橋 綱己,内田 建,「 Ptナノドット修飾グラフェンガスセンサにおけるアルコール検知のアルキル鎖長依存性」,第78回応用物理学会秋季学術講演会(2017秋 福岡国際会議場),17.2 グラフェン, 8a-C16-10,2017年9月8日(一般講演).
  7. 山知 亮介,下川 慶久,横山 誉宗,斎藤 雄太,田中 貴久,高橋 綱己,内田 建,「 Ptナノドット修飾グラフェン水素センサへのイオン液体被膜の影響」,第78回応用物理学会秋季学術講演会(2017秋 福岡国際会議場),17.2 グラフェン, 8a-C16-11, 2017年9月8日(一般講演).
  8. 横山誉宗,下川 慶久,山知 亮介,斎藤 雄太,田中 貴久,高橋 綱己,内田 建,「Pd修飾した架橋グラフェン水素センサにおける自己加熱の影響」,第78回応用物理学会秋季学術講演会(2017秋 福岡国際会議場),17.2 グラフェン, 8a-C16-12,2017年9月8日(一般講演).

2016

Journals

  1. T. Tanaka, Y. Kurosawa, N. Kadotani, T. Takahashi, S. Oda, and K. Uchida, “Deionization of dopants in silicon nanofilms even with donor concentration of greater than 1019 cm-3,” Nano Lett., vol. 16, 1143, January 2016 (7 pages) doi: 10.1021/acs.nanolett.5b04406.
  2. K. Sano, T. Takahashi, and K. Uchida, “Large variability of contact resistance in Au/Cr/MoS2 system and its suppression by Cr thinning, ” Jpn. J. Appl. Phys., vol. 55, 036501, February 2016 (5 pages) doi: 10.7567/JJAP.55.036501.
  3. G. Meng, F. Zhuge, K. Nagashima, A. Nakao, M. Kanai, Y. He, M. Boudot, T. Takahashi, K. Uchida, and T. Yanagida, “Nanoscale Thermal Management of Single SnO2 Nanowire: pico-Joule Energy Consumed Molecule Sensor,” ACS Sensors, vol. 1, pp. 997-1002, July 2016 doi:10.1021/acssensors.6b00364.
  4. T. Takahashi, T. Matsuki, T. Shinada, Y. Inoue, and K. Uchida, “Direct evaluation of self-heating effects in bulk and ultra-thin BOX SOI MOSFETs using four-terminal gate resistance technique,” IEEE J. Electron Devices Soc., vol. 4, 365, September 2016 (9 pages) doi: 10.1109/JEDS.2016.2568261.
  5. T. Ohashi, T. Tanaka, T. Takahashi, S. Oda, and K. Uchida, “Experimental study on deformation potential (Dac) in MOSFETs: Demonstration of increased Dac at MOS interfaces and its impact on electron mobility,” IEEE J. Electron Devices Soc., vol. 4, 278, September 2016 (8 pages) doi: 10.1109/JEDS.2016.2581217.
  6. A. Goto, G. Takeuchi, R. Yamachi, T. Tanaka, T. Takahashi, and K. Uchida, “Impact of Hydrogen on Carrier Mobility and Concentration in Graphene decorated with Pd Nanoparticles,” ECS Trans., vol. 72, pp7-12, September 2016. doi: 10.1149/07214.0007ecst

International Conferences

  1. K. Uchida, “Ultra-low Energy Nano-scaled Sensors for IoT Systems,” 29th International Microprocesses and Nanotechnology Conference (MNC), 10A-4-1, Kyoto, Japan, November 10, 2016 (Invited).
  2. K. Uchida and T. Takahashi, “Thermal-Aware CMOS: Challenges for Future Technology and Design Evolution,” European Solid-State Device Research Conference (ESSDER), A2L-E-3, Lausanne, Switzerland, September 13, 2016 (Invited).
  3. A. Goto, G. Takeuchi, R. Yamachi, T. Tanaka, T. Takahashi, and K. Uchida, “Impact of Hydrogen on Carrier Mobility and Concentration in Graphene decorated with Pd Nanoparticles,” 229th ECS Meeting, San Diego, USA, June 2, 2016.

Domestic Conferences

  1. 田中貴久,高橋綱己,内田建,「誘電率ミスマッチによる高ドープ Si 薄膜中の不純物のイオン化エネルギー上昇の解析」,第63回応用物理学会春季学術講演会(2016春 東工大),13.1 Si 系基礎物性・表面界面・シミュレーション,19p-S223-4,2016年3月19日(一般講演).
  2. 佐野宏亮,足立薫彦,下川慶久,高橋綱己,内田建,「MoS2 FET の電気特性を向上させるための熱処理プロセスの検討」,第63回応用物理学会春季学術講演会(2016春 東工大),17.3 層状物質 ,20p-S421-8,2016年3月20日(一般講演).
  3. 後藤瑛人,竹内豪,山知亮介,田中貴久,高橋綱己,内田建,「Pd ナノドット修飾グラフェンに水素が及ぼす影響」,第63回応用物理学会春季学術講演会(2016春 東工大),17.2 グラフェン,21p-S011-7,2016年3月21日(一般講演)
  4. 竹内豪,後藤瑛人,山口公平,山知亮介,田中貴久,高橋綱己,内田建,「自己加熱を利用した Pd ナノドット修飾グラフェン・ガスセンサ」,第63回応用物理学会春季学術講演会(2016春 東工大),17.2 グラフェン,21p-S011-8,2016年3月21日(一般講演)
  5. 星野伸介,竹内豪,高橋綱己,内田建,「Pt ナノドットを用いた抵抗変化型水素センサの検出特性」,第63回応用物理学会春季学術講演会(2016春 東工大),1.3 新技術・複合新領域,21p-S322-9,2016年3月21日(一般講演)

2015

International Conferences

  1. K. Uchida and T. Takahashi, “Therma-aware Device Design of Nanoscale Electronic Devices for More Moore and More-than-Moore Applications,” The 11th International Nanotechnology Conference on Communication and Cooperation, Fukuoka, Japan, May 11-13, 2015 (Invited).
  2. K. Uchida, “Characterization of thermal properties of nanoscale materials/devices and impact of self-heating effects on the performance of advanced transistors,” 2015 International Conference on IC Design & Technology (ICICDT), Leuven, Belguium, June 01-03, 2015 (Invited Tutorial).

Domestic Conferences

  1. 高橋綱己,内田建,「自己加熱効果の抑制によるFinFET低消費電力化の検討」,第62回応用物理学会春季学術講演会(2015春 東海大学),13. 半導体 分科企画シンポジウム「未来を担う若手科学者の在り方 ~集積化技術の新たな価値創造を目指して~」,12p-A29-3,2015年3月12日(一般講演).
  2. 熊田亜理沙,竹内豪,宮田耕,高橋綱己,内田建,「フォーミングガスアニールがCr/SiO2/Si界面の熱抵抗に与える影響」,第62回応用物理学会春季学術講演会(2015春 東海大学),13. 半導体 分科企画シンポジウム「未来を担う若手科学者の在り方 ~集積化技術の新たな価値創造を目指して~」,12p-A29-4,2015年3月12日(一般講演).
  3. 宮田耕,竹内豪,高橋綱己,内田建,「SOIトランジスタの自己加熱による水素センサの低消費電力化」,第62回応用物理学会春季学術講演会(2015春 東海大学),13.5 デバイス/集積化技術,13p-A23-6,2015年3月13日(一般講演)
  4. 竹内豪,星野伸介,宮田耕,高橋綱己,内田建,「Pdナノドットで修飾したグラフェンナノリボンを用いた水素センサ」,第62回応用物理学会春季学術講演会(2015春 東海大学),17.4 デバイス応用,14a-D7-12,2015年3月14日(一般講演)
  5. 佐野宏亮,高橋綱己,内田建,「Au/Cr/MoS2系におけるCr薄膜化によるコンタクト抵抗特性の改善」,第62回応用物理学会春季学術講演会(2015春 東海大学),17.4 デバイス応用,14p-D7-3,2015年3月14日(一般講演)

2014

Journals

  1. K. Uchida and T. Takahashi, “Extending the FETs: Challenges and Opportunities for New Materials and Structures,” ECS Trans. vol. 64, pp3-11, Oct, 2014. doi:10.1149/06406.0003ecst
  2. F. Zhuge, T. Yanagida, N. Fukata, K. Uchida, M. Kanai, K. Nagashima, G. Meng, Y. He, S. Rahong, X. Li, and T. Kawai, “Modulation of Thermoelectric Power Factor via Radial Dopant Inhomogeneity in B-Doped Si Nanowires,” J. Am. Chem. Soc., vol. 136, pp14100-14106, September 2014. doi: 10.1021/ja5055884
  3. A. Shindome, T. Takahashi, S. Oda, and K. Uchida, “Experimental study on SET/RESET conditions for graphene resistive random access memory,”, Jpn. J. Appl. Phys., vol. 53, 04EN02, February 2014. (5 pages) doi:10.7567/JJAP.53.04EN02
  4. K. Nagata, M. Takei, A. Ogura, and K. Uchida, “Evaluation of phonon confinement in ultrathin-film silicon-on-insulator by Raman spectroscopy,” Jpn. J. Appl. Phys., vol. 53, 032401, February 2014. (5 pages) doi:10.7567/JJAP.53.032401
  5. M. Yamada, K. Uchida, and Y. Miyamoto, “Delay Time Component of InGaAs MOSFET Caused by Dynamic Source Resistance,” IEICE Trans. Elec., vol. E97-C, pp419-422, May 2014. (4 pages) doi:10.1587/transele.E97.C.419
  6. 内田建,”シリコンナノ構造デバイスのキャリア輸送特性と熱配慮設計,” 応用物理, vol. 83, no. 4, pp262-267, April, 2014.

International Conferences

  1. K. Uchida, A. Shindome, and T. Takahashi, “Evaluation of Thermal Properties of Nanoscale MOSFETs and Thermal Aware Device Design of Nano Devices,” 45th IEEE Semiconductor Interface Specialists Conference, San Diego, USA, Dec 10-13, 2014 (Invited).
  2. K. Sano, T. Takahashi, and K. Uchida, ”Large Variability of Contact Resistance in Au/Cr/MoS2 System and Its Suppression by Cr Thinning: International Microprocesses and Nanotechnology Conference (MNC), 7P-11-116L, Fukuoka, Japan, Nov 4-7, 2014.
  3. K. Uchida and T. Takahashi, “Thermal-aware Device Design of Nano-scale Devices,” 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), O02_02, Guilin, China, Oct 28-31, 2014 (Invited).
  4. K. Uchida and T. Takahashi, “Extending the FETs: Challenges and Opportunities for New Materials and Structures,” SiGe, Ge, and Related Compounds: Materials, Processing and Devices in 2014 ECS and SMEQ Joint International Meeting, Cancun, Mexico, October 5-10, 2014 (Plenary).
  5. T. Takahashi, T. Matsuki, T. Shinada, Y. Inoue, and K. Uchida, “Comprehensive Investigation of Self-Heating Effect (SHE) in Nanoscale Planar and Fin FETs: Impacts of Device Parameters on SHE and Analog Performance Optimization,” International Conference on Solid State Devices and Materials (SSDM), J-2-1, Tsukuba, Japan, Sep 9-11, 2014 (Invited).
  6. K. Uchida and T. Takahashi, “Thermal-aware device design of nanoscale MOSFETs,” 6th International Nanoelectronics Conference (INEC) 2014, CMOS3-3, Sapporo, Japan, July 28-31, 2014  (Invited).
  7. K. Uchida, A. Shindome, and T. Takahashi, “Thermal-aware Device Desing of Nano-scale MOS Transistors and Graphene ReRAM Formed by Joule-Heating in Nano-dimensions,” 8th US & Japan Joint Seminar on Nanoscale Transport Phenomena, Santa Cruzu, USA, July13-16, 2014 (Invited).

Domestic Conferences

  1. 高橋綱己,松木 武雄,品田賢宏,井上靖朗,内田建,「ナノスケールバルクおよび極薄膜BOX SOI MOSFET動作温度の評価」,電気学会 ナノエレクトロニクス集積化・応用技術調査専門委員会「原子層材料デバイスとナノスケール熱輸送」,早稲田大学,2014年3月14日(依頼講演).
  2. 内田 建,「ナノデバイスの熱配慮設計:高性能化と新機能創出」,第61回応用物理学関係講演会(2014春 青山学院大学), 13.半導体A(シリコン)分科企画シンポジウム「ナノエレクトロニクスの新展開と国際連携」,17a-E1-3,2014年3月17日(招待講演).
  3. 高橋綱己,松木武雄,品田賢宏,井上靖朗,内田建,「4端子ゲート抵抗法によるナノスケールバルク/極薄膜BOX SOI MOSFET動作温度の評価」,第61回応用物理学関係講演会(2014春 青山学院大学),13.4 半導体A(シリコン) デバイス/集積化技術,19a-F12-2,2014年3月19日(一般講演).
  4. 高橋綱己,別府伸耕,陳君ろ,小田俊理,内田建,「バルク/SOI FinFET の自己加熱およびアナログ特性の最適化」,第61回応用物理学関係講演会(2014春 青山学院大学),シリコンテクノロジー分科会論文賞および奨励賞記 念講演,19a-E4-5,2014年3月19日(受賞講演).
  5. 新留彩,高橋綱己,小田俊理,内田建,「グラフェン抵抗変化型メモリの3端子動作に関する研究」,第61回応用物理学関係講演会(2014春 青山学院大学),17.4 ナノカーボン デバイス応用,20a-E2-5,2014年3月20日(一般講演).
  6. 高橋綱己,内田建,「高熱伝導率 BOX SOI FinFET のアナログおよび I/O 動作特性評価」,第75回応用物理学関係講演会(2014秋 北海道大学),13.1 半導体A(シリコン) 基礎物性・表面界面現象・シミュレーション,19p-A15-11,2014年9月19日(一般講演).

2013

Journals

  1. T. Takahashi, N. Beppu, K. Chen, S. Oda, and K. Uchida, “Self-Heating Effects and Analog Performance Optimization of Fin-Type Field-Effect Transistors,” Jpn. J. Appl. Phys., vol. 52, 04CC03, February 2013. (6 pages) doi:10.7567/JJAP.52.04CC03.
  2. A. Shindome, Y. Doioka, N. Beppu, S. Oda, and K. Uchida, “Experimental Study of Two-Terminal Resistive Random Access Memory Realized in Mono- and Multilayer Exfoliated Graphene Nanoribbons,” Jpn. J. Appl. Phys., vol. 52, 04CN05, February 2013. (5 pages) doi:10.7567/JJAP.52.04CN05
  3. T. Ohashi, S. Oda, and K. Uchida, “Impact of Deformation Potential Increase at Si/SiO2 Interfaces on Stress-Induced Electron Mobility Enhancement in Metal–Oxide–Semiconductor Field-Effect Transistors,” Jpn. J. Appl. Phys., vol. 52, 04CC12 April, 2013. (6pages) doi:10.7567/JJAP.52.04CC12
  4. C. Tanaka, M. Saitoh, K. Ota, K. Uchida, and T. Numata, “SPICE-Based Performance Analysis of Trigate Silicon Nanowire CMOS Circuits,” IEEE Trans. Electron Dev., vol. 60, no. 4, pp1451-1456, April, 2013. doi:10.1109/TED.2013.2247607
  5. T. Takahashi, S. Oda, and K. Uchida, “Methodology for Evaluating Operation Temperatures of Fin-Type Field-Effect Transistors Connected by Interconnect Wires,” Jpn. J. Appl. Phys., vol. 52, 064203, May 2013. (7pages) doi:10.7567/JJAP.52.064203
  6. C. Tanaka, D. Hagishima, K. Uchida, and T. Numata, “Analytical drain current and threshold voltage model and device design of short-channel Si nanowire transistors,” Solid-State Electronics, vol. 86, pp27-31, August, 2013.

International Conferences

  1. T. Ohashi, S. Oda, and K. Uchida, “Impact of Deformation Potential Increase at Si/SiO2 Interfaces on Stress-Induced Electron Mobility Enhancement in MOSFET,” IEEE EDS WIMNACT 37, P-15, Tokyo, Japan, February 18, 2013.
  2. A. Shindome, T. Takahashi, S. Oda, and K. Uchida, “Experimental Study on SET/RESET Conditions for Graphene ReRAM,” International Conference on Solid State Devices and Materials (SSDM), C-4-4, Fukuoka, Japan, Sep 25-27, 2013.
  3. T. Takahashi, T. Matsuki, T. Shinada, Y. Inoue, and K. Uchida, “Comparison of Self-Heating Effect (SHE) in Short-Channel Bulk and Ultra-Thin BOX SOI MOSFETs: Impacts of Doped Well, Ambient Temperature, and SOI/BOX Thicknesses on SHE,” Technical Digest of IEEE International Electron Devices Meeting (IEDM), Washington D.C., USA, Dec 9-11, pp7.4.1-7.4.4, 2013.
  4. K. Uchida, “Low Voltage -How Low Can We Go?”, Technology Rump Session at 2013 Symposium on VLSI Technology, Kyoto, Japan, June 11, 2013. (Rump Session Moderator)
  5. K. Uchida, “How can we enhance LSI functionalities through Material/Device/Architecture Innovations?” Rump Session at 2013 International Conference on Solid State Devices and Materials (SSDM), Fukuoka, Japan, Sep 26, 2013. (Rump Session Moderator)
  6. K. Uchida, “Nanoscale Materials for LSI interconnects,” International Conference on Processing & Manufacturing of Advanced Materials (THERMEC’ 2013), Las Vegas, Dec 2-6, 2013. (Invited).
  7. K. Uchida, “Extending the FETs,” Short Couse at IEEE International Electron Devices Meeting (IEDM), Washington D.C., USA, Dec 8, 2013. (Short Course Lecture)

Domestic Conferences

  1. 新留 彩,土井岡 優,別府 伸耕,小田 俊理,内田 建,「単層および多層グラフェンナノリボン抵抗変化型メモリの実験的研究:動作メカニズムの解明へ向けて」,応用物理学会 薄膜・表面物理分科会・シリコンテクノロジー分科会共催特別研究会「第18回ゲートスタック研究会」,静岡,2013年1月24-26日(一般講演).
  2. 内田建,高橋綱己,別府伸耕,「熱に配慮した次世代集積回路のデバイス設計」,日本学術振興会「先端ナノデバイス・材料テクノロジー第151委員会」平成24年度 第4回研究会「ナノスケールでの熱・エネルギーマネジメント技術」,東京,2013年2月4日(招待講演).
  3. 内田建,高橋綱己,別府伸耕,「立体構造SOIデバイスの自己加熱とデバイスの熱配慮設計」,第157回シリコンテクノロジー分科会研究集会「SOI関連技術の最近の進展」,東京,2013年2月22日(招待講演).
  4. 内田建,「半導体技術ロードマップにおける新探求デバイス(Emerging Resaarch Device)とシリコンのナノサイエンス」,(独)産業技術総合研究所 電子光技術研究部門 第2回電子光技術シンポジウム,東京,2013年3月5日(特別講演).
  5. 大橋 輝之,小田 俊理,内田 建,「歪みによる電子移動度向上へMOS界面における変形ポテンシャル上昇が与える影響」,第60回応用物理学会学術講演会(2013春 神奈川工科大学)13.6 Siデバイス/集積化技術,28p-G9-17,2013年3月27-30日(一般講演).
  6. 新留 彩,別府 伸耕,高橋 綱己,小田 俊理,内田 建,「架橋・非架橋構造のグラフェン抵抗変化型メモリの書込・消去特性」,第60回応用物理学会春季学術講演会(2013春 神奈川工科大学) 17.3 新機能探索・基礎物性評価,29p-G10-3,2013年3月27-30日(一般講演).
  7. 高橋 綱己,別府 伸耕,小田 俊理,内田 建,「熱配慮設計によるFinFETアナログ特性の最適化」,第60回応用物理学会春季学術講演会(2013春 神奈川工科大学) 13.6 Siデバイス/集積化技術,28p-G9-16,2013年3月27-30日(一般講演).
  8. 内田 建,「立体構造トランジスタ:短チャネル効果・自己加熱・ばらつき」,STARCアドバンスト講座(川崎市産業振興会館),2013年5月14日(依頼講演).
  9. 内田 建,「ナノスケールMOSFETのキャリア輸送」,電子情報通信学会2013年ソサイエティ大会(福岡工業大学),C-12-26, 2013年9月18日(受賞講演).
  10. 高橋 綱己,小田 俊理,内田 建,「熱特性モデル化による回路中のFinFET動作温度評価手法」,第74回応用物理学会秋季学術講演会(2013秋 同志社大学)13.6 Siデバイス/集積化技術,20a-C8-10,2013年9月16-20日(一般講演).
  11. 新留 彩,高橋 綱己,小田 俊理,内田 建,「グラフェン抵抗変化型メモリのSET/RESET条件に関する研究」,第74回応用物理学会秋季学術講演会(2013秋 同志社大学)17.3 新機能探索・基礎物性評価,18a-B1-9,2013年9月16-20日(一般講演).
  12. 黒澤裕也,角谷尚哉,高橋綱己,大橋輝之,小田俊理,内田建,「不純物のイオン化エネルギー増大によるナノワイヤトランジスタの電気的特性に与える影響」,第74回応用物理学会秋季学術講演会(2013秋 同志社大学)13.6 Siデバイス/集積化技術,19p-C8-15,2013年9月16-20日.(一般講演)

2012

Journals

  1. B. P. Algul and K. Uchida, “Optimization of Source/Drain Doping Level of Carbon Nanotube Field-Effect Transistors to Suppress OFF-State Leakage Current while Keeping Ideal ON-State Current,” Jpn. J. Appl. Phys., vol. 51, 06FD27, June 2012. (4 pages) doi.org/10.1143/JJAP.51.06FD27
  2. K. Horibe, T. Kodera, T. Kambara, K. Uchida, and S. Oda, “Key capacitive parameters for designing single-electron transistor charge sensors,” J. Appl. Phys., vol. 111, 093715, May 2012. (5 pages) doi:10.1063/1.4711094
  3. K. Ota, M. Saitoh, Y. Nakabayashi, T. Ishihara, K. Uchida, and T. Numata, “Threshold voltage shift and drain current degradation by negative bias temperature instability in Si (110) p-channel metal-oxide-semiconductor field-effect transistor,” Appl. Phys. Lett., vol. 100, 212109, May 2012. (3 pages) doi:10.1063/1.4722796
  4. K. Ota, M. Saitoh, C. Tanaka, Y. Nakabayashi, K. Uchida, and T. Numata, “Enhanced Degradation by Negative Bias Temperature Stress in Si Nanowire Transistor,” Jpn. J. Appl. Phys., vol. 51, 02BC08, February 2012. (5 pages) doi:10.1143/JJAP.51.02BC08
  5. N. Beppu, T. Takahashi, T. Ohashi, and K. Uchida, “Impact of Gate Poly Depletion on Evaluation of Channel Temperature in Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors with Four-Point Gate Resistance Measurement Method,” Jpn. J. Appl. Phys., vol. 51, 02BC15, February 2012. (5 pages) doi:10.1143/JJAP.51.02BC15
  6. M. Saitoh, Y. Nakabayashi, K. Ota, K. Uchida, and T. Numata, “Performance Improvement by Stress Memorization Technique in Trigate Silicon Nanowire MOSFETs,” IEEE Electron Dev. Lett., vol. 33, pp.8-10, January 2012. (3 pages) doi:10.1109/LED.2011.2171315
  7. G. Yamahata, T. Kodera, H. O. H. Churchill, K. Uchida, C. M. Marchus, S. Oda, “Magnetic field dependence of Pauli spin blockade: A window into the source of spin relaxation in silicon quantum dots,” Phys. Rev. B, vol. 86, 115322, November 2012. (5 pages) doi:10.1103/PhysRevB.86.115322
  8. T. Ohashi, S. Oda, and K. Uchida, “Physical Mechanisms of Enhanced Uniaxial Stress Effect on Carrier Mobility in ETSOI MOSFETs,” ECS Trans., vol. 50, no. 9, 171-174, 2012.

International Conferences

  1. N. Beppu, S. Oda, and K. Uchida, “Experimental Study of Self-Heating Effect (SHE) in SOI MOSFETs: Accurate Understanding of Temperatures during AC Conductance Measurement, Proposals of 2-omega Method and Modified Pulsed IV,” Technical Digest of IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, Dec 8-10, pp641-644, 2012.
  2. T. Ohashi, S. Oda, and K. Uchida, “Physical Mechanism of Enhanced Uniaxial Stress Effect on Carrier Mobility in ETSOI MOSFETs,” 222nd ECS Meeting The SiGe, Ge, and Related Compounds Symposium, E17~E25-0155O, pp3118, Honolulu, HW, USA, October 7-12, 2012.
  3. T. Takahashi, N. Beppu, S. Oda, and K. Uchida, “Optimization of 14-nm Node Bulk/SOI FinFETs for SoC Platform: Thermal Conductivity, Operation Temperatures, and Analog Performance Analysis,” International Conference on Solid-Stated Devices and Materials (SSDM), E-6-5L, pp823-824, September 25-27, 2012.
  4. T. Ohashi, T. Takahashi, T. Kodera, S. Oda, and K. Uchida, “Experimental Observation of Record-high Electron Mobility of Greater than 1100 cm2V-1s-1 in Unstressed Si MOSFETs and Its Physical Mechanisms,” International Conference on Solid-Stated Devices and Materials (SSDM), E-5-1, pp807-808, September 25-27, 2012.
  5. A. Shindome, Y. Doioka, N. Beppu, S. Oda, and K. Uchida, “Graphene ReRAM towards All Graphene LSIs: Experimental Demonstration of Two-terminal ReRAM Operation in Electrically Broken Mono- and Multi-layer Graphene,” International Conference on Solid-Stated Devices and Materials (SSDM), C-5-5L, pp690-691, September 25-27, 2012.
  6. N. Beppu, T. Takahashi, T. Ohashi, and K. Uchida,”Impact of Poly Depletion on Accurate Evaluation of Self-Heating Effects in SOI MOSFETs with Four-point Gate Resistance Measurement Method”, The Eighth International Nanotechnology Conference on Communication and Cooperation, Tsukuba, Japan, May 8-11, 2012.
  7. T. Ohashi, T. Takahashi, S. Oda and K. Uchida, “Experimental Evidence of Increased Deformation Potential at MOS Interface and Its Impact on Characteristics of ETSOI FETs,” The Eighth International Nanotechnology Conference on Communication and Cooperation, Tsukuba, Japan, May 8-11, 2012.
  8. T. Takahashi, N. Beppu, K. Chen, S. Oda and K. Uchida, “Thermal-Aware Device Design of Nanoscale Bulk/SOI FinFETs,” The Eighth International Nanotechnology Conference on Communication and Cooperation, Tsukuba, Japan, May 8-11, 2012.
  9. M. Saitoh, K. Ota, C. Tanaka, Y. Nakabayashi, K. Uchida, and T. Numata, “Performance, variability and reliability of silicon tri-gate nanowire MOSFETs,” 2012 IEEE International Reliability Physics Symposium (IRPS), 6A.3.1 – 6A.3.6, Anaheim, CA, USA, 15-19 April 2012 (Invited).
  10. K. Uchida, T. Takahashi, and N. Beppu, “Thermal-aware Device Design of Nano-scale FETs,” Tsukuba Nanotechnology Syposium (TNS ’12), p10, Tukuba, Japan, July 26, 2012 (Invited).
  11. K. Uchida, T. Takahashi, and N. Beppu, “Thermal-Aware Device Design of Nanoscale MOS Transistors,” 2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices (AWAD 2012), Naha, Japan, 8A-2, p288-289, June 29, 2012 (Invited).
  12. K. Uchida and T. Ohashi, “Experimental Study on Deformation Potential at MOS Interface”, IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), S13_01, Xian, China, Oct. 29 – Nov. 1, 2012 (Invited).

Domestic Conferences

  1. 高橋 綱己,別府 伸耕,小田 俊理,内田 建,「デバイスシミュレータを用いたナノスケールBulk/SOI FinFET熱等価回路モデルの導出」,第73回応用物理学会学術講演会(2012秋 愛媛大学・松山大学)13.6 Siデバイス/集積化技術,13p-F4-2,2012年9月11-14日(一般講演).
  2. 大橋 輝之,高橋 綱己, 小寺 哲夫,小田 俊理,内田 建,「ユニバーサル曲線を超えるMOSFET移動度の観測とその物理的起源の解明」,第73回応用物理学会学術講演会(2012秋 愛媛大学・松山大学)13.6 Siデバイス/集積化技術,13p-F4-12,2012年9月11-14日(一般講演).
  3. 新留 彩,福田 祐樹,小田 俊理,内田 建,「グラフェンナノリボン抵抗変化型メモリの実現」,第73回応用物理学会学術講演会(2012秋 愛媛大学・松山大学)17.3 新機能探索・基礎物性評価,12p-C2-8,2012年9月11-14日(一般講演).
  4. 高橋 綱己,別府 伸耕,陳 君璐,小田 俊理,内田 建,「デバイスシミュレータを用いたナノスケールBulk/SOI FinFETの熱設計」,第59回応用物理学関係講演会(2012春 早稲田大学)13.6 Siデバイス/集積化技術,17a-A1-9,2012年3月15-18日(一般講演).
  5. 大橋 輝之,高橋 綱己,小田 俊理,内田 建,「MOS界面における変形ポテンシャルの上昇」,第59回応用物理学関係講演会(2012春 早稲田大学)13.6 Siデバイス/集積化技術,17a-A1-3,March 15-18,2012年3月15-18日(一般講演).
  6. 陳 君璐,高橋 綱己,別府 伸耕,内田 建,「High-kゲートスタック構造における熱伝導の比較」,第59回応用物理学関係講演会(2012春 早稲田大学)13.3 絶縁膜技術,15p-GP1-5,2012年3月15-18日(一般講演).
  7. 新留 彩,福田 祐樹,小田 俊理,内田 建,「架橋多層グラフェンナノリボンにおける電荷数の温度依存性」,第59回応用物理学関係講演会(2012春 早稲田大学) 17 ナノカーボン,15a-A3-31,2012年3月15-18日(一般講演).
  8. 別府 伸耕,小田 俊理,内田 建,「ACコンダクタンス法及びパルスIV法による自己発熱抑制時のSOI MOSFETドレイン電流評価」,第59回応用物理学関係講演会(2012春 早稲田大学) 13.6 Siデバイス/集積化技術,17a-A1-8,2012年3月15-18日(一般講演).
  9. 黒澤 裕也,角谷 直哉, 高橋 綱己,大橋 輝之, 小田 俊理,内田 建, 「ナノ薄膜SOIにおける不純物のイオン化エネルギーの増大」,第59回応用物理学関係講演会(2012春 早稲田大学) 13.6 Siデバイス/集積化技術,17a-A1-4,2012年3月15-18日 (一般講演).
  10. 内田 建,大橋 輝之,別府 伸耕,高橋 綱己,角谷 直哉,「MOS界面における変形ポテンシャルに関する実験的研究」,第152回シリコンテクノロジー分科会研究集会「最先端シリコンナノエレクトロニクスの動向と今後の展開」,つくば,2012年9月4日(招待講演
  11. 高橋 綱己,内田 建,「FinFET発熱解析によるアナログ特性最適化および素子温度モデル化」,電気学会ナノエレクトロニクス集積化・応用技術調査専門委員会「ナノデバイスの熱管理工学」,早稲田大学,2012年11月30日(招待講演

2011

Journals

  1. T. Takahashi, T. Kodera, S. Oda, and K. Uchida, “Experimental study on subband structures and hole transport in (110) Si p-type metal-oxide-semiconductor field-effect transistors under high magnetic field,” J. Appl. Phys., vol. 109, no. 3, 034505, February 2011. (7 pages) doi:10.1063/1.3543990
  2. Y. Nakamine, N. Inaba, T. Kodera, K. Uchida, R. N. Pereira, A. R. Stegner, M. S. Brandt, M. Stutzman, and S. Oda, “Size Reduction and Phosphorus Doping of Silicon Nanocrystals Prepared by a Very High Frequency Plasma Deposition System,”Jpn. J. Appl. Phys., vol. 50, 025002, February 2011. (5 pages) doi:10.1143/JJAP.50.025002
  3. M. Saitoh, Y. Nakabayashi, K. Uchida, and T. Numata, ” Short-Channel Performance Improvement by Raised Source/Drain Extensions With Thin Spacers in Trigate Silicon Nanowire MOSFETs,” IEEE Electron Dev. Lett., vol. 32, pp273-275, March 2011. doi:10.1109/LED.2010.2101043
  4. T. Kambara, T. Kodera, T. Takahashi, G. Yamahata, K. Uchida, S. Oda, “Simulation study of charge modulation in coupled quantum dots in silicon,” Jpn. J. Appl. Phys., vol. 50, 04DJ05, 2011. (4 pages) doi:10.1143/JJAP.50.04DJ05
  5. B. P. Algul, T. Kodera, S. Oda, and K. Uchida, “Study on Device Parameters of Carbon Nanotube Field Electron Transistors to Realize Steep Subthreshold Slope of Less than 60 mV/decade,” Jpn. J. Appl. Phys., vol. 50, 04DN01, April 2011. (4 pages) doi:10.1143/JJAP.50.04DN01
  6. N. Kadotani, T. Takahashi, T. Ohashi, S. Oda, and K. Uchida, “Electron mobility enhancement in nanoscale silicon-on-insulator diffusion layers with high doping concentration of greater than 1E18 cm-3 and silicon-on-insulator thickness of less than 10 nm,” J. Appl. Phys., vol. 110, no. 3, 034502, 2011. (7 pages) doi:10.1063/1.3606420
  7. N. Kadotani, T. Ohashi, T. Takahashi, S. Oda, and K. Uchida, “Experimental Study on Electron Mobility in Accumulation-Mode Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect Transistors,” Jpn. J. Appl. Phys., vol. 50, 094101, September 2011. (4 pages) doi:10.1143/JJAP.50.094101
  8. M. Simanullang, K. Usami, T. Kodera, K. Uchida, and Shunri Oda, “Growth of Narrow and Straight Germanium Nanowires by Vapor?Liquid?Solid Chemical Vapor Deposition,” Jpn. J. Appl. Phys., vol.50, 105002, October 2011. (6 pages) doi:10.1143/JJAP.50.105002
  9. M. Simanullang, K. Usami, T. Kodera, K. Uchida, and S. Oda,”Germanium Nanowires with 3-nm-Diameter Prepared by Low Temperature Vapour-Liquid-Solid Chemical Vapour Deposition,” J. Nanoscience Nanotechnol., vol. 11, 8163, September 2011. (6 pages) doi:10.1166/jnn.2011.5049
  10. Y. Nakamine, T. Kodera, K. Uchida, and S. Oda, “Removal of Surface Oxide Layer from Silicon Nanocrystals by Hydrogen Fluoride Vapor Etching,”, Jpn. J. Appl. Phys., vol. 50, 115002, November 2011. (4 pages) doi:10.1143/JJAP.50.115002

International Conferences

  1. T. Takahashi, N. Beppu, K. Chen, S. Oda, and K. Uchida, “Thermal-Aware Device Design of Nanoscale Bulk/SOI FinFETs: Suppression of Operation Temperature and Its Variability,” Technical Digest of IEEE International Electron Devices Meeting (IEDM), Washington D.C., USA, Dec 5-7, pp809-812, 2011. doi:10.1109/IEDM.2011.6131672
  2. T. Ohashi, T. Takahashi, N. Beppu, S. Oda, and K. Uchida, “Experimental Evidence of Increased Deformation Potential at MOS Interface and Its Impact on Characteristic of ETSOI FETs ,” Technical Digest of IEEE International Electron Devices Meeting (IEDM), Washington D.C., USA, Dec 5-7, pp390-393, 2011. doi:10.1109/IEDM.2011.6131566
  3. T. Ohashi, T. Takahashi, S. Oda and K. Uchida, “Mechanism of Electron Mobility Enhancement in Junctionless SOI MOSFETs”, G-COE PICE International Workshop, October 4-5, 2011
  4. N. Beppu, T. Takahashi, T. Ohashi, and K. Uchida, “Accurate Evaluation of Self-Heating Effects in SOI MOSFETs with Four-point Gate Resistance Measurement Method”, G-COE PICE International Workshop, October 4-5, 2011.
  5. N. Beppu, T. Takahashi, T. Ohashi, and K. Uchida, “Impact of Poly Depletion on Accurate Evaluation of Self-Heating Effects in SOI MOSFETs with Four-point Gate Resistance Measurement Method”, International Conference on Solid-Stated Devices and Materials (SSDM), P-3-21L, pp124-125, September 28-30, 2011.
  6. T. Takahashi, T. Kodera, S. Oda, and K. Uchida, “Experimental Study on Subband Structures and Hole Transport in (110) Si pMOSFETs under High Magnetic Field,” The Seventh International Nanotechnology Conference on Communication and Cooperation, Albany, NY, USA, May 16-19, 2011.
  7. K. Uchida and T. Takahashi, “Thermal-Aware Device Design of Nanoscale MOS Transistors,” 16th International Workshop on Physics of Semiconductor Devices (IWPSD), MS-1-1, Kanpur, India, December 21, 2011 (Invited).
  8. K. Uchida, “Carrier mobility in heavily-doped nanoscale SOI films,” G-COE PICE International Symposium and IEEE EDS Minicolloquium on Advanced Hybrid Nano Devices: Prospects by World’s Leading Scientists, Tokyo, Japan, October 5, 2011 (Invited).
  9. K. Uchida, N. Kadotani, T. Takahashi, “Carrier Transport in Ultrathin-body SOI FETs: Mobility in Channel and Diffusion Layers,” IEEE 4th International Nanoelectronics Conference, Tao-Yuan, Taiwan, June 21-24, 2011 (Invited).

Domestic Conferences

  1. 内田 建,「STRJ Extended CMOSコンセプト」,第72回応用物理学会学術講演会(2011秋 山形大学)シンポジウム “Extended CMOSのためのDeterministicドーピング,単一ドーパントデバイス”, 2011年 8月29日-9月2日(招待講演).
  2. 内田 建,「ナノ半導体のデバイス応用:トランジスタ応用を中心として」,第72回応用物理学会学術講演会(2011秋 山形大学)チュートリアル,2011年 8月29日-9月2日(招待講演).
  3. 陳 君璐,高橋 綱己,別府 伸耕,内田 建,「High-kゲートスタック構造における熱伝導に関する研究」,第72回応用物理学会学術講演会(2011秋 山形大学)13.1 基礎物性・評価,1p-J-11,2011年 8月29日-9月2日.
  4. 大橋 輝之,高橋 綱己, 小寺 哲夫,小田 俊理, 内田 建,「低温・強磁場環境を利用した極薄膜SOI中の変形ポテンシャルの評価」,第72回応用物理学会学術講演会(2011秋 山形大学)13.1 基礎物性・評価,2a-J-11,2011年 8月29日-9月2日(一般講演).
  5. 別府伸耕,高橋綱己,大橋輝之,陳 君璐,内田 建,「SOI MOSFETにおける自己加熱の実験的評価:電子熱伝導は寄与するか?」,第72回応用物理学会学術講演会(2011秋 山形大学),13.6 Siデバイス/集積化技術,1a-P7-11,2011年 8月29日-9月2日 (一般講演).

2010

Journals

  1. X. Zhou, K. Uchida, and S. Oda, “Current fluctuations in three-dimensionally stacked Si nanorystals thin films”, Appl. Phys. Lett., vol. 96, no. 9, 092112, March 2010. (3 pages) doi:10.1063/1.3294329
  2. J. Ogi, M. A. Ghiass, T. Kodera, Y. Tsuchiya, K. Uchida, S. Oda, and H. Mizuta, “Suspended Quantum Dot Fabrication on a Heavily Doped Silicon Nanowire by Suppressing Unintentional Quantum Dot Formation,” Jpn. J. Appl. Phys., vol. 49, 044001, April 2010. (5 pages) doi:10.1143/JJAP.49.044001
  3. T. Nagami, Y. Tsuchiya, K. Uchida, H. Mizuta, and S. Oda, “Scaling Analysis of Nanoelectromechanical Memory Devices”,Jpn. J. Appl. Phys., vol. 49, 044304, April 2010. (5 pages) doi:10.1143/JJAP.49.044304
  4. J. Ogi, M. A. Ghiass, T. Kodera, Y. Tsuchiya, K. Uchida, S. Oda, and H. Mizuta, “Experimental Observation of Enhanced Electron?Phonon Interaction in Suspended Si Double Quantum Dots,” Jpn. J. Appl. Phys., vol. 49, 045203, April 2010. (5 pages) doi:10.1143/JJAP.49.045203
  5. Y. Nakabayashi, T. Ishihara, T. Numata, K. Uchida, and S. Takagi, “Experimental Evaluation of Coulomb-Scattering-Limited Inversion-Layer Mobility of n-type Metal?Oxide?Semiconductor Field-Effect Transistors on Si(100), (110), and (111)-Surfaces: Impact of Correlation between Conductivity Mass and Normal Mass,” Jpn. J. Appl. Phys., vol. 49, 04DC21, April 2010. (4 pages) doi:10.1143/JJAP.49.04DC21
  6. S. Kobayashi, M. Saitoh, Y. Nakabayashi, T. Ishihara, T. Numata, and K. Uchida, “Hall Factor in Ultrathin-Body Silicon-on-Insulator n-Type Metal-Oxide-Semiconductor Field-Effect Transistors,” Jpn. J. Appl. Phys., vol. 49, 04DC23, April 2010. (5 pages) doi:10.1143/JJAP.49.04DC23
  7. B. Pruvost, K. Uchida, H. Mizuta, S. Oda, “Design of New Logic Architectures Utilizing Optimized Suspended-Gate Single-Electron Transistors,” IEEE Trans. on Electron Devices, vol. 9, no. 7, pp504-512, July 2010. doi:10.1109/TNANO.2009.2030502
  8. M. Saitoh, N. Yasutake, Y. Nakabayashi, K. Uchida, and T. Numata, “Physical Origin of Threshold Voltage Variation Enhancement in Si(110) n/pMOSFETs,” IEEE Trans. Electron Devices, Vol. 57, no. 10, pp2493-2948, October 2010. doi:10.1109/TED.2010.2059592
  9. T. Ishikawa, H. Nikaido, K. Usami, K. Uchida and S. Oda, “Fabrication of Nanosilicon Ink and Two-Dimensional Array of Nanocrystalline Silicon Quantum Dots,” Jpn. J. Appl. Phys., vol. 49, 125002, December 2010. (4 pages) doi:10.1143/JJAP.49.125002
  10. G. Bourianoff, M. Brillouet, R. K. Cavin, T. Hiramoto, J. A. Hutchby, A. M. Ionescu, and K. Uchida, “Nanoelectronics Research for Beyond CMOS Information Processing”, Proc. IEEE, vol. 98, no. 12, pp1986-1992, December 2010. doi:10.1109/JPROC.2010.2077211
  11. G. Bourianoff, M. Brillouet, R. K. Cavin, T. Hiramoto, J. A. Hutchby, A. M. Ionescu, and K. Uchida, “Regional, National, and International Nanoelectronics Research Program: Topical Concentration and Gaps,”, Proc. IEEE, vol. 98, no. 12, pp1993-2004, December 2010. doi:10.1109/JPROC.2010.2061210

International Conferences (Refereed)

  1. N. Kadotani, T. Takahashi, K. Chen, T. Kodera, S. Oda, K. Uchida, “Anomalous Electron Mobility in Extremely-Thin SOI (ETSOI) Diffusion Layers with SOI Thickness of Less Than 10nm and High Doping Concentration of Greater Than 1E18cm-3”, Technical Digest of International Electron Device Meeting (IEDM), San Francisco, CA, USA, Dec 6-8, pp54-57, 2010. doi:10.1109/IEDM.2010.5703288
  2. M. Saitoh, Y. Nakabayashi, K. Ota, K. Uchida, and T. Numata, “Understanding of Short-Channel Mobility in Tri-Gate Nanowire MOSFETs and Enhanced Stress Memorization Technique for Performance Improvement”, Technical Digest of International Electron Device Meeting (IEDM), San Francisco, CA, USA, Dec 6-8, pp780-783, 2010.
  3. B. P. Algul, T. Kodera, S. Oda, and K. Uchida, “Study on Device Parameters of Carbon Nanotube FETs to Realize Steep Subthreshold Slope of less than 60 mV/decade”, Ext Abst. of the International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, September, pp147-148, 2010.
  4. Y. Nakabayashi, M. Saitoh, T. Ishihara, T. Numata, K. Uchida, and J. Koga, “Heavily-Doped Poly-Si Gate and Epi-First Source/Drain Extension Technique in Strained Si Nanowire MOSFETs with Reduced Parasitic Resistance,” Ext Abst. of the International Conference on Solid State Devices and Materials (SSDM), Tokyo, Japan, September, pp709-710, 2010.
  5. H. Ota, M. Saitoh, Y. Nakabayashi, T. Ishihara, T. Numata, and K. Uchida, “Threshold voltage shift and drain current degradations by NBI stress in Si (110) pMOSFETs,” ESSDERC, p134-137, 2010
  6. M. Saitoh, Y. Nakabayashi, H. Itokawa, M. Murano, I. Mizushima, K. Uchida, and T. Numata, “Short-Channel Performance and Mobility Analysis of <110>- and <100>-Oriented Tri-Gate Nanowire MOSFETs with Raised Source/Drain Extensions”, Symposium on VLSI Technology (VLSI Symp.), Honolulu, HI, USA, June 15-17, pp169-170, 2010.
  7. K. Uchida, “Carrier transport in (110) n- and p-MOSFETs,” 11th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Shanghai, China, November 4, I05_16, November 2010 (Invited).
  8. K. Uchida, “Hole/Electron Transport in (110) pMOSFETs,” China Semiconductor Technology International Conference (CSTIC), Shanghai, China, March 18, 2010.(Invited).

Domestic Conferences

  1. 角谷 直哉,高橋 綱己,小寺 哲夫,小田 俊理,内田 建,「pn接合の無い極薄膜SOIトランジスタの作製と電気特性評価」,第71回応用物理学会学術講演会(2010秋 長崎大学)13.6 Siデバイス/集積化技術,16a-ZE-2,2010(一般講演).
  2. 高橋 綱己,山端 元音,小木 純,小寺 哲夫,小田 俊理,内田 建,「強磁場印加による(110)pMOSFETサブバンド構造の直接的観測」,第57回応用物理学関係講演会(2010春 東海大学)13.6 Siデバイス/集積化技術,18a-B-2,2010(一般講演).

2009

Journals

  1. B. Pruvost, K. Uchida, H. Mizuta, S. Oda, “Design Optimization of NEMS Switches for Suspended-Gate Single-Electron Transistor Applications,” IEEE Trans. on Nanotechnology, vol.8, no. 2, pp174-184, March, 2009. doi:10.1109/TNANO.2008.2010453
  2. G. Yamahata, Y. Tsuchiya, H. Mizuta, K. Uchida, and S. Oda, “Electron transport through silicon serial triple quantum dots,” Solid-State Electron., vol. 53, no. 7, pp779-785, April, 2009. doi:10.1016/j.sse.2009.03.009
  3. M. Ono, K. Uchida, and T. Tezuka, “Advantages of Densely Packed Multi-Wire Transistors with Planar Gate Structure Fabricated on Low-k Buried Insulator over Planar Silicon-on-Insulator Devices,” Jpn. J. Appl. Phys., vol. 48, 054505, May 2009. (6 pages) doi:10.1143/JJAP.48.054505
  4. X. Zhou, K. Uchida, H. Mizuta, and S. Oda, “Carrier transport by field enhanced thermal detrapping in Si nanocrystals thin films,” J. Appl. Phys., vol. 105, no. 12, 124518, June 2009. (5 pages) doi:10.1063/1.3151688
  5. M. Saitoh, S. Kobayashi, and K. Uchida, “Stress Engineering in High-k FETs for Mobility and On-Current Enhancements,”IEEE Trans.  Electron Devices, vol. 56, no. 7, pp1451-1457, July 2009. doi:10.1109/TED.2009.2021345
  6. S. Kobayashi, M. Saitoh, K. Uchida, “Hole mobility enhancement by double-gate mode in ultrathin-body silicon-on-insulator p-type metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., vol. 106, no. 2, 024511, July 2009. (6 pages) doi:10.1063/1.3182792
  7. G. Yamahata, T. Kodera, H. Mizuta, K. Uchida, and S. Oda, “Control of Inter-Dot Electrostatic Coupling by a Side Gate in a Silicon Double Quantum Dot Operating at 4.5 K,” Applied Physics Express, vol. 2, 095002, August 2009 (3 pages) doi:10.1143/APEX.2.095002.
  8. X. Zhou, K. Uchida, H. Mizuta, S. Oda, “Electron transport in surface oxidized Si nanocrystal ensembles with thin film transistor structure,” J. Appl. Phys., vol. 106, no. 4, 044511, August 2009. (3 pages) doi:10.1063/1.3204669

International Conferences

  1. T. Takahashi, G. Yamahata, J. Ogi, T. Kodera, S. Oda, and K. Uchida, “Direct Observation of Subband Structures in (110) pMOSFETs under High Magnetic Field: Impact of Energy Split between Bands and Effective Masses on Hole Mobility,” Technical Digest of International Electron Device Meeting (IEDM), Baltimore, MD, USA, pp477-480, December 7-9, 2009.
  2. M. Saitoh, N. Yasutake, Y. Nakabayashi, K. Uchida, and T. Numata, “Understanding of Strain Effects on High-Field Carrier Velocity in (100) and (110) CMOSFETs under Quasi-Ballistic Transport,” Technical Digest of International Electron Device Meeting (IEDM), Baltimore, MD, USA, pp469-472, December 2009.
  3. K. Uchida, “Trend and prospects of Si devices for LSI applications,” G-COE PICE International Symposium on Silicon Nano Devices in 2030, Tokyo, Japan, p48, October 13-14, 2009.
  4. S. Kobayashi, M. Saitoh, Y. Nakabayashi, T. Ishihara, T. Numata, and K. Uchida, “Experimental Study on Hall Factor in Ultrathin-Body SOI n-MOSFETs,” Ext Abst. of the International Conference on Solid State Devices and Materials (SSDM), Sendai, Japan, pp1054-1055, October 2009.
  5. Y. Nakabayashi, T. Ishihara, T. Numata, K. Uchida, and S. Takagi, “Inversion-Layer Mobility Limited by Coulomb Scattering on Si (100), (110) and (111) n-MOSFETs,” Ext Abst. of the International Conference on Solid State Devices and Materials (SSDM), Sendai, Japan, pp1052-1053, October 2009.
  6. K. Uchida, “Single-Electron Devices for Ubiquitous and Secured Computing Applications,” 46th Design Automation Conference (DAC), San Francisco, CA, USA, July 26-31, pp301-303, July 2009 (special session).
  7. M. Saitoh, N. Yasutake, Y. Nakabayashi, K. Uchida, and T. Numata, “Physical Understanding of Vth and Idsat Variations in (110) CMOSFETs,” Symposium on VLSI Technology (VLSI Symp.), Kyoto, Japan, pp114-115, June 2009.
  8. A. Goyal, M. A. Rafiq, K. Uchida, S. Oda, “Parameter Randomness Analysis of Multiple Tunnel Junctions,” IEEE Silicon Nanoelectronics Workshop, Kyoto, Japan, June 2009.
  9. J. Ogi, T. Ferrus, Y. Tsuchiya, K. Uchida, D. A. Williams, S. Oda, and H. Mizuta, “Study of single-electron transport via suspended double silicon quantum dots,” IEEE Silicon Nanoelectronics Workshop, Kyoto, Japan, June, 2009.
  10. T. Kurihara, Y. Nagahama, D. Kobayashi, H. Niikura, Y. Tsuchiya, H. Mizuta, H. Nohira, K. Uchida, and S. Oda, “Engineering of Heterostructured Tunnel Barrier for Non-Volatile Memory Applications: Potential of Pr-based Heterostructured Barrier as a Tunneling Oxide,” IEEE Silicon Nanoelectronics Workshop, Kyoto Japan, June, 2009.
  11. X. Zhou, K. Uchida, H. Mizuta, and S. Oda, “Lateral conduction of Si nanorystals by thin film transistor structures,” IEEE Silicon Nanoelectronics Workshop, Kyoto, Japan, June, 2009.
  12. X. Zhou, K. Uchida, H. Mizuta, and S. Oda, “Current oscillations observed for sparse Si nanorystal thin films,” IEEE Silicon Nanoelectronics Workshop, Kyoto, Japan, June, 2009.
  13. S. Kobayashi, T. Ishihara, M. Saitoh, Y. Nakabayashi, T. Numata, K. Uchida, “Successful measurements of Electron energy dependence of interface-trap-induced scattering in N-MOSFETs,” IEEE International Reliability Physics Symposium, pp26-30, April 2009.
  14. K. Uchida, “Carrier Transport and Stress Engineering in Advanced Nanoscale MOS Transistors,” Proceedings of International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), Hsinchu, Taiwan, April 27-30, pp6-7, 2009 (Keynote).
  15. K. Uchida and M. Saitoh, “Uniaxial Stress Engineering in (100) and (110) CMOS Transistors,” Physics and Chemistry of Surfaces and Interfaces (PCSI-36), Santa Barbara, CA, USA, January 11-15, 2009 (Invited).

2008

Journals

  1. M. Matsumoto, R. Ohba, S. Yasuda, K. Uchida, T. Tanamoto, and S. Fujita, “Non-Stoichiometric SixN Metal–Oxide–Semiconductor Field-Effect Transistor for Compact Random Number Generator with 0.3 Mbit/s Generation Rate,” Jpn. J. Appl. Phys., vol. 47, pp.6191-6195 (2008). doi:10.1143/JJAP.47.6191

International Conferences

  1. M. Saitoh, N. Yasutake, Y. Nakabayashi, T. Numata, and K. Uchida, “Comprehensive Performance Assessment of Scaled (110) CMOSFETs Based on Understanding of STI Stress Effects and Velocity Saturation,” Technical Digest of International Electron Device Meeting (IEDM), pp573-576, December 2008.
  2. M. Saitoh, A. Kaneko, K. Okano, T. Kinoshita, S. Inaba, Y. Toyoshima, and K. Uchida, “Three-Dimensional Stress Engineering in FinFETs for Mobility/On-Current Enhancement and Gate Current Reduction”, Symposium on VLSI Technology (VLSI Symp.), Honolulu, HI, p18-19, June 2008.
  3. S. Kobayashi, M. Saitoh, and K. Uchida, “Id Fluctuations by Stochastic Single-Hole Trappings in High-k Dielectric p-MOSFETs”, Symposium on VLSI Technology (VLSI Symp.), p78-79, June 2008.
  4. K. Uchida, M. Saitoh, and S. Kobayashi, “Carrier Transport and Stress Engineering in Advanced Nanoscale Transistors From (100) and (110) Transistors To Carbon Nanotube FETs and Beyond,” Technical Digest of International Electron Device Meeting (IEDM), pp569-572, December 2008 (Invited).
  5. K. Uchida and M. Saitoh, “Stress Engineering in (100) and (110) nMOSFETs,” 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), Peking, China, October 20-23, pp109-112, 2008 (Invited).
  6. K. Uchida, “Mobility in Si MOSFETs- an Overview -,” SiNANO-Nanosil Workshop, Bertinoro, Italy, September 6, 2008(Invited).
  7. K. Uchida, “Performance Booster Technologies for Advanced MOSFETs: Stress Engineering and Surface Orientations other than (001),” Nanoelectronic Circuits and Tools summer school, Lausanne, July 16, 2008 (Invited).
  8. K. Uchida, “Classical versus Ballistic Transport,” Nanoelectronic Circuits and Tools summer school, Lausanne, July 16, 2008 (Invited).

2007

Journals

  1. H. Watanabe, K. Uchida, and A. Kinoshita, “Numerical Study on C-V Characteristics of Double-Gate Ultrathin SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 54, no. 1, pp52-58, January, 2007. doi:10.1109/TED.2006.887053
  2. T. Tanamoto, K. Uchida, and S. Fujita, “The effect of side-traps on ballistic transistor in Kondo regime,” Jpn. J. of Applied Physics, vol. 40, No. 4B, pp.2073-2075, April, 2007. doi:10.1143/JJAP.46.2073
  3. K. Uchida, J. Koga, and S. Takagi, “Phonon-limited electron mobility in ultrathin-body silicon-on-insulator metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., vol. 102, no. 7, 074510, October, 2007. (8 pages) doi:10.1063/1.2785957
  4. K. Uchida, T. Tanamoto, and S. Fujita, “Single-Electron Random Number Generator (RNG) for Highly Secured Ubiquitous Computing Applications,” Solid-State Electron., vol. 51, no. 11-12, pp1552-1557, November, 2007. doi:10.1016/j.sse.2007.09.015
  5. S. Kobayashi, M. Saitoh, and K. Uchida, “Experimental study of uniaxial stress effects on Coulomb-limited mobility in p-type metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 91, no. 20, 203506, November, 2007. (3 pages) doi:10.1063/1.2807832
  6. K. Uchida and M. Saitoh, “Impact of axial strain on drain current of carbon-nanotube field-effect transistors with doped junctions,” Appl. Phys. Lett., vol. 91, no, 20, 203520, November, 2007. (3 pages) doi:10.1063/1.2813016

International Conferences

  1. S. Kobayashi, M. Saitoh, and K. Uchida, “More-than-Universal Mobility in Double-Gate SOI p-FETs with Sub-10-nm Body Thickness ?Role of Light-Hole Band and Compatibility with Uniaxial Stress Engineering?,” Technical Digest of International Electron Device Meeting (IEDM), pp707-710, December 2007.
  2. M. Saitoh, S. Kobayashi, and K. Uchida, “Physical Understanding of Fundamental Properties of Si (110) pMOSFETs ~ Inversion Capacitance, Mobility Universality, and Uniaxial Strain Effects ~,” Technical Digest of International Electron Devices Meeting (IEDM), pp711-714, December 2007.
  3. S. Kobayashi, M. Saitoh, Y. Nakabayashi, and K. Uchida, “Experimental Study of Uniaxial Stress Effects on Coulomb-limited Electron and Hole Mobility in Si-MOSFETs,” Ext Abst. of the International Conference on Solid State Devices and Materials (SSDM), September 2007.
  4. M. Saitoh, S. Kobayashi, and K. Uchida, “Stress Engineering for High-k FETs: Mobility and Ion Enhancements by Optimized Stress,” Symposium on VLSI Technology (VLSI Symp.), Kyoto, Japan, p132-133, June 2007.
  5. K. Uchida, “Single-Electron Transistor and Circuits for Future Ubiquitous Computing Applications,”New Frontiers in Nanoscale Electronics, Lausanne, July 6-10, 2007 (Invited).
  6. K. Uchida, “Physics and Engineering of Nanoscale Silicon Field-Effect Transistors,” International Conference on Nanoelectronics, Nanostructures and Carrier Interactions, Atsugi, Japan, February 20-23, p159, 2007 (Invited).

Before 2006

Journals

  1. T. Ishihara, K. Uchida, J. Koga, and S. Takagi, “Unified roughness scattering model incorporating scattering component induced by thickness fluctuations in silicon-on-insulator metal-oxide-semiconductor field-effect transistors, ” Jpn. J. Appl. Phys., vol.45, no.4B, pp.3125-3132, April, 2006.  doi:10.1143/JJAP.45.3125
  2. T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nishi, and K. C. Saraswat, “High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: experiments”, IEEE Trans. Electron Devices, vol. 53, No. 5, pp990-999, May, 2006.  doi:10.1109/TED.2006.872362
  3. S. Takagi, T. Mizuno, T. Tezuka, N. Sugiyama, S. Nakaharai, T. Numata, J. Koga, and K. Uchida, “Subband Structure Engineering for Advanced CMOS Channels”, Solid-State Electron, vol.49, no.5, pp.684-94, May, 2005.  doi:10.1016/j.sse.2004.08.020
  4. S. Yasuda, H. Satake, T. Tanamoto, R. Ohba, K. Uchida, and S. Fujita, “Physical random number generator based on MOS structure after soft breakdown,” J. Solid-State Circuits, vol. 39, no. 8, pp.1375-7, August, 2004.  doi:10.1109/JSSC.2004.831480
  5. K. Uchida and S. Takagi, “Carrier scattering induced by thickness fluctuation of silicon-on-insulator film in ultrathin-body metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 82, no. 17, pp.2916-2918, April, 2003.  doi:10.1063/1.1571227
  6. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Programmable Single-Electron Transistor Logic for Future Low-Power Intelligent LSI: Proposal and Room-temperature Operation,” IEEE Trans. Electron Devices, vol. 50, no. 7, pp.1623-1630, July, 2003.  doi:10.1109/TED.2003.813909
  7. T. Tanamoto, R. Ohba, K. Uchida, and S. Fujita, “Noise power spectrum of a long-channel current line with electron traps: Slave-boson mean field theory,” J. Appl. Phys., vol. 94, no. 6, pp. 3979-3983, September, 2003. doi:10.1063/1.1603342
  8. R. Ohba, N. Sugiyama, K. Uchida, J. Koga, and A. Toriumi, “Nonvolatile Si quantum memory with self-aligned doubly-stacked dots,” IEEE Trans. Electron Devices, vol. 49, no. 8, pp.1392-1398, August, 2002. doi:10.1109/TED.2002.801296
  9. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Power Consumption of Hybrid Circuits of Single-Electron Transistors and Complementary Metal-Oxide-Semiconductor Field-Effect Transistors,” IEICE Trans. Electron., vol. E84-C, no. 8, pp.1066-1070, August, 2001.
  10. K. Uchida, J. Koga, R. Ohba, S. Takagi, and A. Toriumi, “Silicon single-electron tunneling device fabricated in an undulated ultrathin silicon-on-insulator film,” J. Appl. Phys., vol. 90, no. 7, pp.3551-3557, October, 2001. doi:10.1063/1.1392959
  11. K. Matsuzawa, K. Uchida, and A. Nishiyama, “A Unified Simulation of Schottky and Ohmic Contacts,” IEEE Trans. Electron. Devices, vol. 47, no. 1, pp.103-108, January, 2000.  doi:10.1109/16.817574
  12. R. Ohba, N. Sugiyama, J. Koga, K. Uchida, and A. Toriumi, “Influence of Channel Depletion on the Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory,” Jpn. J. Appl. Phys., vol. 39, no. 3A, pp.989-993, March, 2000. doi:10.1143/JJAP.39.989
  13. K. Uchida, K. Matsuzawa, J. Koga, R. Ohba, S. Takagi, and A. Toriumi, “Analytical Single-Electron Transistor (SET) Model for Design and Analysis of Realistic SET Circuits,” Jpn. J. Appl. Phys., vol. 39, no. 4B, pp.2321-2324, April, 2000. (4 pages) doi:10.1143/JJAP.39.2321
  14. K. Uchida, K. Matsuzawa, J. Koga, S. Takagi, and A. Toriumi, “Enhancement of hot-electron generation rate in Schottky source metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 76, no. 26, pp.3992-3994, June, 2000. (3 pages) doi:10.1063/1.126845
  15. K. Matsuzawa, K. Uchida, and A. Nishiyama, “Monte Carlo Simulation of Sub-0.1 um Devices with Schottky Contact Model,”IEICE Trans. Electron., vol. E83-C, no. 8, pp.1212-1217, August, 2000.
  16. K. Uchida, J. Koga, A. Ohata, and A. Toriumi, “Silicon single-electron tunneling device interfaced with a CMOS inverter,”Nanotechnology, vol. 10, no. 2, pp.198-200, June, 1999. (3 pages) doi:10.1088/0957-4484/10/2/315
  17. K. Uchida, K. Matsuzawa, and A. Toriumi, “A New Design Scheme for Logic Circuits with Single Electron Transistors,” Jpn. J. Appl. Phys., vol. 38, no. 7A, pp.4027-4032, July, 1999. (6 pages) doi:10.1143/JJAP.38.4027
  18. A. Toriumi, K. Uchida, R. Ohba, and J. Koga, “Challenge and prospects for silicon SET/FET hybrid circuits,” Physica B, vol. 272, pp.522-526, December, 1999. (5 pages) doi:10.1016/S0921-4526(99)00392-0
  19. A. Ohata, A. Toriumi, and K. Uchida, “Coulomb Blockade Effects in Edge Quantum Wire SOI MOSFETs,” Jpn. J. Appl. Phys., vol. 36, no. 3B, pp.1686-1689., March, 1997. (4 pages) doi:10.1143/JJAP.36.1686

International Conferences (Refereed)

  1. K. Uchida, A. Kinoshita, and M. Saitoh, “Carrier Transport in (110) nMOSFETs: Subband Structures, Non-Parabolicity, Mobility Characteristics, and Uniaxial Stress Engineering,” Technical Digest of International Electron Devices Meeting (IEDM), pp1019-1021, December 2006.
  2. M. Saitoh and K. Uchida, “Universal Relationship between Low-Field Mobility and High-Field Carrier Velocity in High-k and SiO2 Gate Dielectric MOSFETs,” Technical Digest of International Electron Devices Meeting (IEDM), pp.261-264, December 2006.
  3. A. Kinoshita, T. Kinoshita, Y. Nishi, K. Uchida, S. Toriyama, R. Hasumi, and J. Koga, “Comprehensive Study on Injection Velocity Enhancement in Dopant-Segregated Schottky MOSFETs,” Technical Digest of International Electron Devices Meeting (IEDM), pp.79-82, December 2006.
  4. M. Matsumoto, R. Ohba, S. Yasuda, K. Uchida, T. Tanamoto, and S. Fujita, “Random Number Generator with 0.3 MHz Generation Rate using Non-Stoichiometric SixN MOSFET,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p280-281, September 2006.
  5. T. Tanamoto, K. Uchida, and S. Fujita, “The effect of side-traps on ballistic transistor in Kondo regime,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p354-355, September 2006.
  6. K. Uchida, T. Krishnamohan, K. C. Saraswat, Y. Nishi, “Physical Mechanisms of Electron Mobility Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime,” Technical Digest of International Electron Devices Meeting (IEDM), pp135-138, December 2005.
  7. T. Ishihara, K. Uchida, J. Koga, and S. Takagi, “Unified Roughness Scattering Model Incorporating Scattering Component Induced by Thickness Fluctuation in SOI MOSFETs,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p42-43, September 2005.
  8. A. Kinoshita, C. Tanaka, K. Uchida, and J. Koga, “High-performance 50-nm-Gate-Length Schottky-Source/Drain MOSFETs with Dopant-Segregation Junctions,” VLSI Technology Symposium, pp158-159, June 2005.
  9. T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nishi, and K. C. Saraswat, “Low Defect Ultra-thin Fully Strained-Ge MOSFET on Relaxed Si with High Mobility and Low Band-To-Band=Tuneling (BTBT)”, VLSI Technology Symposium, pp82-83. June 2005.
  10. K. Uchida, R. Zednik, C.-H. Lu, H. Jagannathan, J. McVittie, P. C. McIntyre, and Y. Nishi, “Experimental Study of Biaxial and Uniaxial Strain Effects on Carrier Mobility in Bulk and Ultrathin-body SOI MOSFETs,” Technical Digest of International Electron Devices Meeting (IEDM), pp229-232, December 2004.
  11. R. Ohba, S. Yasuda, T. Tanamoto, K. Uchida, S. Fujita, “Narrow-channel-MOSFET having Si-dots for High-rate generation of Random Numbers,” Technical Digest of International Electron Devices Meeting (IEDM ), pp.745-748, December 2004.
  12. A. Kinoshita, Y. Tsuchiya, A. Yagishita, K. Uchida, and J. Koga, “Successful CMOS Operation of Dopant-Segregation Schottky Barrier Transistors (DS-SBTs),” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p172-3, September 2004.
  13. A. Pethe, T. Krishnamohan, K. Uchida, K. C. Saraswat, “Analytical Modeling of Ge and Si Double-Gate(DG) NFETs and the Effect of Process Induced Variations (PIV) on Device Performance,” Proceedings of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), p359-362, September 2004.
  14. A. Kinoshita, Y. Tsuchiya, A. Yagishita, K. Uchida, and J. Koga, “Solution for High-Performance Schottky-Source/Drain MOSFETs: Schottky Barrier Height Engineering with Dopant Segregation Technique,” VLSI Technology Symposium, pp.168-169, June 2004.
  15. S. Fujita, K. Uchida, S.-I. Yasuda, R. Ohba, H. Nozaki, T. Tanamoto, “Si Nanodevices for Random-Number-Generating Circuits for Cryptographic Security,” International Solid-State Circuit Conference Digest of Technical Papers (ISSCC), p294-5, February 2004.
  16. K. Uchida, J. Koga, and S. Takagi, “Experimental Study on Carrier Transport Mechanisms in Double- and Single-Gate Ultrathin-Body MOSFETs -Coulomb Scattering, Volume Inversion, and dTsoi-induced Scattering-,” Technical Digest of International Electron Devices Meeting (IEDM), pp.805-808, December 2003.
  17. H. Watanabe, K. Uchida, and A. Kinoshita, “Quantum Confinement Effect of nMOS Ultrathin-Body SOI Double Gate Capacitor,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p270-271, 2003.
  18. A. Kinoshita, K. Uchida, and J. Koga, “Experimental Evidence of Gate-Induced Schottky Barrier Height Lowering due to Image Force in Gated Schottky Diodes,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p710-711, September 2003.
  19. S. Yasuda, H. Satake, H. Nozaki, T. Tanamoto, R. Ohba, K. Uchida, A. Kinoshita, and S. Fujita, “Ultra Small Random Number Generating Circuits with a Novel Noise Source Device,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), p374-375, September 2003.
  20. S. Yasuda, K. Uchida, T. Tanamoto, R. Ohba, and S. Fujita, “Ultra-small physical random number generators based on Si nanodevices for security systems and comparison to other large physical random number generators,” IEEE Conference on Nanotechnology, vol. 2, pp.531-534, August 2003.
  21. S. Fujita, K. Uchida, S. Yasuda, R. Ohba, and T. Tanamoto, “Novel Random Number Generator Based on Si Nanodevices for Mobile Communication Security System,” Natnotech 2003, vol. 3, pp.309-312, San Francisco, CA, June 2003.
  22. K. Uchida, H. Watanabe, A. Kinoshita, J. Koga, T. Numata, and S. Takagi, “Experimental Study on Carrier Transport Mechanism in Ultrathin-body SOI n- and p-MOSFETs with SOI Thickness less than 5 nm,” Technical Digest of International Electron Devices Meeting (IEDM), pp.47-50, December 2002.
  23. K. Uchida, T. Tanamoto, R. Ohba, S. Yasuda, and S. Fujita, “Single-Electron Random-Number Generator (RNG) for Highly Secure Ubiquitous Computing Applications,” Technical Digest of International Electron Devices Meeting (IEDM), pp.177-180, December 2002.
  24. T. Numata, K. Uchida, J. Koga, and S. Takagi, “Device Design for Subthreshold Slope and Threshold Voltage Control in Sub-100 nm Fully-Depleted SOI MOSFETs,” Digest of IEEE SOI Conference, pp.179-180, October 2002.
  25. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Programmable Single-Electron Transistor Logic for Low-Power Intelligent Si LSI,” International Solid-State Circuit Conference Digest of Technical Papers (ISSCC), pp.206-207, February 2002.
  26. K. Uchida, J. Koga, R. Ohba, T. Numata, and S. Takagi, “Experimental Evidences of Quantum-Mechanical Effects on Low-field Mobility, Gate-channel Capacitance, and Threshold Voltage of Ultrathin Body SOI MOSFETs,” Technical Digest of International Electron Devices Meeting (IEDM), pp.633-636, December 2001.
  27. R. Ohba, N. Sugiyama, K. Uchida, J. Koga, and S. Fujita, “Non-Volatile Doubly Stacked Si Dot Memory with Si Nano-Crystalline Layer,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.590-591, September 2001.
  28. J. Koga, R. Ohba, K. Uchida, and A. Toriumi, “Silicon Single-Electron Memory & Logic Devices for Room Temperature Operation,” Technical Digest of International Electron Devices Meeting (IEDM), December 2001.
  29. K. Matsuzawa, K. Uchida, A. Nishiyama, T. Numata, and M. Noguchi, “Device Simulation and Measurement of Hybrid SBTT,” Proceedings of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.380-383, September 2001.
  30. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Room-Temperature Operation of Multifunctional Single-Electron Transistor Logic,” Technical Digest of International Electron Devices Meeting (IEDM), pp.863-865, December 2000.
  31. R. Ohba, N. Sugiyama, K. Uchida, J. Koga, and A. Toriumi, “Non-Volatile Si Quantum Memory with Self-Aligned Doubly-Stacked Dots,” Technical Digest of International Electron Devices Meeting (IEDM), pp.313-316, December 2000.
  32. R. Ohba, N. Sugiyama, K. Uchida, J. Koga, and A. Toriumi, “Novel Si Quantum Dot Memory with Self-Aligned Doubly Stacked Dot Structures,” Ext. Abst. of 4th International Workshop on Quantum Functional Devices, pp.167-168, November 2000.
  33. J. Koga, R. Ohba, K. Uchida, and A. Toriumi, “Metal-Oxide-Nitride-Dot-Oxide-Silicon (MONDOS) Nonvolatile Memory”, Ext. Abst. of 4th International Workshop on Quantum Functional Devices, pp.165-166, November 2000.
  34. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Room-Temperature Operation of Si Single-Electron Tunneling (SET) Devices and Experimental Demonstration of SET/CMOS Hybrids,” Ext. Abst. of 4th International Workshop on Quantum Functional Devices, pp.179-180, November 2000.
  35. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “SET/CMOS Hybrid for Future Low-Power LSI -Experimental Demonstration, Power Estimation, and Strategy for Its Reduction,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.120-121, September 2000.
  36. R. Ohba, N. Sugiyama, J. Koga, K. Uchida, and A. Toriumi, “Novel Si Quantum Memory Structure with Self-Aligned Stacked Nanocrystalline Dots,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.122-123, September 2000.
  37. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Surface Orientation Effect on Fabrication of Silicon Nanostructures through Chemical Surface Treatment,” Workshop Abst. of 2000 IEEE Silicon Nanoelectronics Workshop, pp.73-74, June 2000.
  38. K. Uchida, J. Koga, R. Ohba, and A. Toriumi, “Sub-um Silicon SETs on Self-Undulated Hyper-Thin SOI Films,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.74-75, Tokyo, September 1999.
  39. K. Uchida, K. Matsuzawa, J. Koga, R. Ohba, and A. Toriumi, “Proposal of Analytical Single-Electron Transistor Model and Its Implication for Realistic Circuit Operation,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.86-87, Tokyo, September 1999.
  40. R. Ohba, N. Sugiyama, J. Koga, K. Uchida, and A. Toriumi, “Experimental Analysis of Carrier Charging Characteristics in Si Nanocrystal Floating Gate Memory,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.78-79, Tokyo, September 1999.
  41. K. Matsuzawa, K. Uchida, and A. Nishiyama, “Monte Carlo simulation of 50nm devices with Schottky contact model,” Proceedings of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.35-38, September 1999.
  42. K. Uchida, J. Koga, R. Ohba, S. Takagi, and A. Toriumi, “Planar Non-Volatile Memory with Single-Electron Channel Fabricated on a Hyper-thin SOI Film,” 1999 57th Annual Device Research Conference Digest (DRC), pp.138-139, July 1999.
  43. K. Uchida, K. Matsuzawa, J. Koga, S. Takagi, and A. Toriumi, “Evidence of Hot Electron Injection in Schottky Source MOSFETs,” Workshop Abst. of 1999 IEEE Silicon Nanoelectronics Workshop, pp.74-75, June 1999.
  44. K. Matsuzawa, K. Uchida, and A. Nishiyama, “Simulations of Schottky barrier diodes and tunnel transistors,” 1998 Sixth International Workshop on Computational Electronics Extended Abstracts (IWCE), pp.163-165, October, 1998.
  45. K. Uchida, K. Matsuzawa, and A. Toriumi, “Room Temperature Operating CMOS-like Logic Circuits with Single Electron Tunneling Devices,” Ext. Abst. of the International Conference on Solid State Devices and Materials (SSDM), pp.188-189, Hiroshima, September 1998.
  46. K. Uchida, J. Koga, A. Ohata, and A. Toriumi, “Silicon Single Electron Tunneling Device interfaced with a CMOS Inverter,” Workshop Abst. of 1998 IEEE Silicon Nanoelectronics Workshop, pp.59-60, June 1998.
  47. R. Ohba, N. Sugiyama, J. Koga, K. Uchida, and A. Toriumi, “Single Electron Charging Characteristics in Nano-crystal Floating Gate Memory,” Int. Symp. on Formation, Physics and Device Application of Quantum Dot Structures, p. 74, June 1998.
  48. A. Toriumi, J. Koga, K. Uchida, and A. Ohata, “Quantum-Function-Embedded Silicon Devices,” The 3rd International Workshop on Quantum Functional Devices, pp.23-26, November, 1997.
  49. K. Uchida, “Carrier Transport and Stress Engineering in Ultrathin-body SOI MOSFETs,” ECS SiGe Symposium, Cancun, Mexico, October 30, 2006 (Invited).
  50. K. Uchida, “Single-Electron Transistor and Circuits for Future Ubiquitous Computing Applications,” Proceedings of the 36th European Solid-State Device Research Conference (ESSDERC), Montreux, Switzerland, September 21, pp17-20, 2006 (Plenary).
  51. K. Uchida, “Transport in ultra-thin SOI devices,” SINANO Workshop, Grenoble, Alpexpo, France, September 16, 2005 (Invited).
  52. K. Uchida, “Modeling of Nanoscaled FETs: Ultrathin-body SOI FETs vs Carbon nanotube FETs,” NSF-MEXT Joint International Workshop for Carbon Nanotube and Its Applications, Stanford University, Stanford, United States, September 12, 2005 (Invited).
  53. K. Uchida, “Experimental Study on Biaxial and Uniaxial Stress Effects on Carrier Mobility in Bulk and Ultrathin-Body MOSFETs,” IEEE SCV EDS Half-Day Symposium, National Semiconductor Auditorium, June 24, 2005 (Invited).
  54. K. Uchida, “Experimental Study on Carrier Transport Mechanisms in Ultrathin-body SOI MOSFETs,” Advanced Workshop on ‘Frontiers in Electronics’, Aruba, p5, December, 2004 (Invited).
  55. K. Uchida, J. Koga, and S. Takagi, “Carrier Transport in Ultrathin Si Layers of SOI MOSFETs,” Workshop Abst. of 2004 IEEE Silicon Nanoelectronics Workshop, Honolulu, United States, pp.17-18, June 2004 (Invited).
  56. K. Uchida, J. Koga, and S. Takagi, “Carrier Transport in Ultrathin Si Layers of SOI MOSFETs,” Symposium on Nano Device Technology, Hsinchu, Taiwan, pp.95-100, May 2004 (Invited).
  57. K. Uchida, H. Watanabe, A. Kinoshita, J. Koga, and S. Takagi, “Experimental Study on Carrier Transport Mechanism in Ultrathin-body SOI MOSFETs,” Proceedings of International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Cambridge, United States, pp.8-13, September 2003 (Plenary).

Tutorials / Short Course Lectures at International Conferences 

  1. K. Uchida, “Channel Resistance: Mobility Enhancement Techniques,” 2009 IEDM Short Course, Scaling Challenges: Device Architectures, New Materials, and Process Technologies, Baltimore, MD, USA, December 6, 2009.
  2. K. Uchida, “Mobility Enhancement Technology for Advanced MOSFETs: Stress and Quantum Confinement,” International Conference on Solid-Stated Devices and Materials (SSDM), September, 2006 (in Japanese).
  3. K. Uchida, “High-Mobility Channel MOSFETs”, Material Research Symposium (MRS) Spring Meeting, San Francisco, April, 2005.
  4. K. Uchida and J. Koga, “Mobility in Si MOSFETs,” Symposium on Nano Device Technology, Hsinchu, Taiwan, May 10, 2004.

Panel Discussions 

  1. K. Uchida, “Low-power Electronics Q&A”, The Eighth International Nanotechnology Conference on Communication and Cooperation (INC8),” Tuskuba, Japan, May 9, 2012 (Moderator).
  2. K. Uchida, Panel Discussion at IS-AHND, Tokyo, Japan, October 5, 2011 (Moderator).
  3. K. Uchida, “Future Roadmap for Graphene Science and Technology,” Panel Discussion at International Conference at Solid-State Devices and Materials, Nagoya, Japan, September 28, 2011 (Panelist).
  4. K. Uchida, “Key Technology Options for 16nm CMOS and Beyond – Breaking the Barriers,” Panel Discussion at Symposium on VLSI Technology, Kyoto, Japan, June 15, 2009 (Panelist).
  5. K. Uchida, “New Materials Meet Advanced Silicon Technology,” Panel Discussion at International Conference at Solid-State Devices and Materials, Tsukuba, Japan, September 20, 2007 (Moderator).
  6. K. Uchida, Panel Discussion at IEEE Silicon Nanoelectronis Workshop, Kyoto, Japan, June 9, 2003 (Moderator).

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